px1041a NXP Semiconductors, px1041a Datasheet - Page 23

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px1041a

Manufacturer Part Number
px1041a
Description
Pci Express Stand-alone X4 Phy Semiconductors
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 15.
PX1041A_1
Objective data sheet
Side-band signals
DESKEW_START
DESKEW_VALID
LANEREVERS
PIPESEL
PIPELOOPB
Optional functions summary
8.14 Optional functions
The JTAG interface is a 3.3 V CMOS signaling. JTAG TRST_N must be asserted LOW for
normal device operation. If JTAG is not planned to be used, it is recommended to
pull down TRST_N and other JTAG input signals to V
The PHY supports some optional functions:
These features can be activated by either the side-band signals or the in-band encoded
commands.
When ENCODEN pin is set to LOW, all functions will be controlled by the dedicated
side-band signal pins;
When ENCODEN pin is set to HIGH, the PHY expects encoded commands to activate the
required function. Any activity on the corresponding pins will be ignored.
Table 15
The principle of the in-band signaling is based on the use of some invalid 8b/10b special
character symbols as encoded commands.
commands, and
ENCODEN = 0
1 = start lane-to-lane deskew
1 = indicates deskew operation is completed
and passed
1 = causes all lanes to reverse
0 = PXPIPE interface selected
1 = PIPE interface selected
1 = at PXPIPE side, TXDATA[7:0] directly
loopback to RXDATA[7:0]
Lane-to-lane deskew
Lane reversal
PXPIPE-side parallel loopback
PIPE mode select
summarizes these optional functions.
Table 17
Rev. 01 — 21 June 2007
is for the status signals.
ENCODEN = 1
don’t care; PHY expects an encoded command
don’t care; PHY expects an encoded command
don’t care; PHY expects an encoded command
0 = PXPIPE interface selected
1 = PIPE interface selected
0 = PHY expects an encoded command
1 = reserved
Table 16
summarizes the encoded
SS
PCI Express stand-alone X4 PHY
via resistors.
PX1041A
© NXP B.V. 2007. All rights reserved.
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