mk5025q-1002 STMicroelectronics, mk5025q-1002 Datasheet - Page 30
mk5025q-1002
Manufacturer Part Number
mk5025q-1002
Description
High Speed Link Level Controller
Manufacturer
STMicroelectronics
Datasheet
1.MK5025Q-1002.pdf
(64 pages)
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MK50H25
Table 3: Address and Control Field Handling By The MK50H25 Receiver In Transparent Mode
30/64
DACE
NOTES:
1. MEM1 is the first location and MEM2 is the second location where received data is loaded. MEM1 and MEM2 are
each 16 bits wide.
2. C is the received, single octet, control field. CC ->MEMx means the single octet control field C is loaded into both
bytes of a 16 bit memory location. Similarly, A is a single octet address field, and AA ->MEMx means the single octet
address field A is loaded into both bytes of a 16 bit memory location.
3. EC is an extended control field (2 octets). If EXTC=1 and either of the 2 LSB’s of the control filed is 0, the control field
is considered extended, This determines whether CC or EC ->MEMx. However, when EXTCF is set to 1, the control
field is always extended
4. EA is an extended address field (2 octets). ”A or EA filtered” means that one octet of the A-field is filtered if the LSB =
1, or two octets are filtered if the LSB = 0. Similarly ”AA or EA -> MEM1” means that AA is loaded into memory if the
LSB = 0; else, EA is loaded. This conforms to HDLC rules for extended address. However, if EXTAF is set to 1, two
octets are filtered regardless of the LSB, and EA will be loaded into memory.
5. .PROM is defined in CSR2 bit 10.
6. DACE, EXTA, EXTAF, EXTC, and EXTCF are as defined in the Mode register. X = Do not care.
0
0
0
0
0
0
0
0
0
0
0
1
1
PROM
0
0
0
0
0
0
1
1
1
1
1
0
1
EXTA
0
0
1
1
1
1
0
0
1
1
1
X
X
EXTAF
X
X
0
0
0
1
0
1
0
0
0
1
0
EXTC
0
1
0
0
1
1
0
1
0
0
1
X
X
EXTCF
X
X
0
0
0
0
0
1
0
0
0
0
1
A filtered
A filtered
A or EA filtered
EA filtered
A or EA filtered
EA filtered
Not filtered, AA -> MEM1
Not filtered, AA ->MEM1
Not filtered, AA or EA -> MEM1
Not filtered, EA -> MEM1
Not filtered, AA or EA -> MEM1
First 2 octets always filtered
Total transparent mode
Address Field Handling
CC -> MEM1
CC or EC -> MEM1
CC -> MEM1
CC -> MEM1
CC or EC -> MEM1
EC -> MEM1
CC -> MEM2
CC or EC -> MEM2
CC -> MEM2
CC -> MEM2
EC -> MEM2
EC -> MEM1
All data after opening flag &
before FCS -> memory
Control Field Handling
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