mk5025q-1002 STMicroelectronics, mk5025q-1002 Datasheet - Page 53

• Manufacturer Part Number: mk5025q-1002
• Description: High Speed Link Level Controller
• Manufacturer: STMicroelectronics

MK50H25
Figure 7a: MK50H25 Reduced Cycle BUS Master Timing (Read) (for CYCLE = 1, CSR2<15>)
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DAL0-15
A 16-23
SYSCLK
READY
NOTES:
1. This reduced DMA Cycle Time is selected by setting CSR2 bit 15, CYCLE =1.
3. The Bus Master cycle time will increase from a minimum, in 1 SYSCLK increments
2. Output delay times are the maximum delay from the specifed edge to a valid output.
BM0,1
DALO
READ
HOLD
HLDA
until the slave device returns READY.
DAS
DALI
ALE
64
24
45
27
23
23
49
29
T 1
25
ADDR
50
30
T 2
43
40
T 3
ADDRESS
60
46
T 4
44
31
DATA IN
47
T 5
28
32
61
26
41
65
42
22
48
48