lm5046sqx National Semiconductor Corporation, lm5046sqx Datasheet - Page 13

• Manufacturer Part Number: lm5046sqx
• Description: Phase-shifted Full-bridge Pwm Controller With Integrated Mosfet Drivers
• Manufacturer: National Semiconductor Corporation

For example, if the desired oscillator frequency is 400 kHz i.e.
each phase (LO1 or LO2) at 200 kHz, the value of R
25kΩ. If the LM5046 is to be synchronized to an external
clock, that signal must be coupled into the RT pin through a
100pF capacitor. The RT pin voltage is nominally regulated
at 2.0V and the external pulse amplitude should lift the pin to
between 3.5V and 5.0V on the low-to-high transition. The
synchronization pulse width should be between 15 and
200ns. The RT resistor is always required, whether the oscil-
lator is free running or externally synchronized and the SYNC
frequency must be equal to, or greater than the frequency set
by the RT resistor. When syncing to an external clock, it is
recommended to add slope compensation by connecting an
appropriate resistor from the VCC pin to the CS pin. Also dis-
able the SLOPE pin by grounding it.
Cycle-by-Cycle Current Limit
The CS pin is to be driven by a signal representative of the
transformer’s primary current. If the voltage on the CS pin ex-
ceeds 0.75V, the current sense comparator immediately ter-
minates the PWM cycle. A small RC filter connected to the
CS pin and located near the controller is recommended to
suppress noise. An internal 18Ω MOSFET discharges the ex-
ternal current sense filter capacitor at the conclusion of every
cycle. The discharge MOSFET remains on for an additional
40ns after the start of a new PWM cycle to blank leading edge
spikes. The current sense comparator is very fast and may
respond to short duration noise pulses. Layout is critical for
the current sense filter and the sense resistor. The capacitor
associated with CS filter must be placed very close to the de-
vice and connected directly to the CS and AGND pins. If a
current sense transformer is used, both the leads of the trans-
former secondary should be routed to the filter network, which
should be located close to the IC. When designing with a cur-
rent sense resistor, all of the noise sensitive low power ground
connections should be connected together near the AGND
pin, and a single connection should be made to the power
ground (sense resistor ground point).
FIGURE 2. Hiccup Mode Delay and Soft-Start Timing Diagram
T
will be
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Hiccup Mode
The LM5046 provides a current limit restart timer to disable
the controller outputs and force a delayed restart (i.e. Hiccup
mode) if a current limit condition is repeatedly sensed. The
number of cycle-by-cycle current limit events required to trig-
ger the restart is programmed by the external capacitor at the
RES pin. During each PWM cycle, the LM5046 either sources
or sinks current from the RES capacitor. If current limit is de-
tected, the 5μA current sink is disabled and a 30μA current
source is enabled. If the RES voltage reaches the 1.0V
threshold, the following restart sequence occurs, as shown in
Figure
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The hiccup mode function can be completely disabled by
connecting the RES pin to the AGND pin. In this configuration
the cycle-by-cycle protection will limit the maximum output
current indefinitely, no hiccup restart sequences will occur.
The SS and SSSR capacitors are fully discharged
The 30μA current source is turned-off and the 10μA
current source is turned-on.
Once the voltage at the RES pin reaches 4.0V the 10μA
current source is turned-off and a 5μA current sink is
turned-on, ramping the voltage on the RES capacitor
down to 2.0V.
Once RES capacitor reaches 2.0V, threshold, the 10μA
current source is turned-on again. The RES capacitor
voltage is ramped between 4.0V and 2.0V eight times.
When the counter reaches eight, the RES pin voltage is
pulled low and the soft-start capacitor is released to begin
a soft-start sequence. The SS capacitor voltage slowly
increases. When the SS voltage reaches 1.0V, the PWM
comparator will produce the first narrow pulse.
If the overload condition persists after restart, cycle-by-
cycle current limiting will begin to increase the voltage on
the RES capacitor again, repeating the hiccup mode
sequence.
If the overload condition no longer exists after restart, the
RES pin will be held at ground by the 5μA current sink and
the normal operation resumes.
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