lm5046sqx National Semiconductor Corporation, lm5046sqx Datasheet - Page 17

• Manufacturer Part Number: lm5046sqx
• Description: Phase-shifted Full-bridge Pwm Controller With Integrated Mosfet Drivers
• Manufacturer: National Semiconductor Corporation

Synchronous Rectifier Control
Outputs (SR1 & SR2)
Synchronous rectification (SR) of the transformer secondary
provides higher efficiency, especially for low output voltage
converters, compared to the diode rectification. The reduction
of rectifier forward voltage drop (0.5V - 1.5V) to 10mV -
200mV VDS voltage for a MOSFET significantly reduces
rectification losses. In a typical application, the transformer
secondary winding is center tapped, with the output power
inductor in series with the center tap. The SR MOSFETs pro-
vide the ground path for the energized secondary winding and
the inductor current. From
the HO1/LO2 diagonal is turned ON, power transfer is en-
abled from the primary. During this period, the SR1 MOSFET
is enabled and the SR2 MOSFET is turned-off. The sec-
ondary winding connected to the SR2 MOSFET drain is twice
the voltage of the center tap at this time. At the conclusion of
the HO1/LO2 pulse, the inductor current continues to flow
through the SR2 MOSFET body diode. Since the body diode
causes more loss than the SR MOSFET, efficiency can be
improved by minimizing the T
time T
fixed dead-time, along with inherent system delays due to
galvanic isolation, plus the gate drive ICs, will provide suffi-
cient margin to prevent the shoot-through current.
During the freewheeling period, the inductor current flows in
both the SR1 and SR2 MOSFETs, which effectively shorts the
transformer secondary. The SR MOSFETs are disabled at the
SRON
is internally fixed to be 30ns. The 30ns internally
Figure 5
SRON
period. In the LM5046, the
it can be seen that when
17
rising edge of the CLK, which also disables HO1 or LO1. As
shown in
is disabled, and SR2 is disabled at the same instant as LO1
is disabled. The dead-times, T
ferent things but are set by single resistor, RD1. Therefore,
RD1 value should be selected such that the SR1/SR2 turns-
off before the next power transfer cycle is initiated by T
The SR drivers are powered by the REF regulator and each
SR output is capable of sourcing 0.1A and sinking 0.4A peak.
The amplitude of the SR drivers is limited to 5V. The 5V SR
signals enable the LM5046 to transfer SR control across the
isolation barrier either through a solid-state isolator or a pulse
transformer. The actual gate sourcing and sinking currents for
the synchronous MOSFETs are provided by the secondary-
side bias and gate drivers.
T
tween RD1 and RD2 pins and AGND. It should be noted that
while RD1 effects the maximum duty cycle, RD2 does not.
The RD1 and RD2 resistors should be located very close to
the device. The formula for RD1 and RD2 resistors are given
below:
If the desired dead-time for T
20 kΩ.
PA
and T
Figure
AP
can be programmed by connecting a resistor be-
5, SR1 is disabled at the same instant as HO1
PA
SROFF
is 60ns, then the RD1 will be
and T
PA
achieve two dif-
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PA
.