tmp88ps42ng TOSHIBA Semiconductor CORPORATION, tmp88ps42ng Datasheet - Page 26

• Manufacturer Part Number: tmp88ps42ng
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

2. Functional Description
2.1 Functions of the CPU Core
2.1.4.4
Example 1 :Entering STOP mode from NORMAL mode by testing P20 port
Example 2 :Entering STOP mode from NORMAL mode by INT5 interrupt
SSTOPH :
PINT5 :
SINT5 :
Controlling Operation Modes
(1)
STOP
setting STOP (SYSCR1 Register bit 7) to 1. During STOP mode, the device retains the following
state.
by SYSCR1<RELM>.
STOP mode
STOP mode is controlled by System Control Register 1 (SYSCR1) and the
The device is released from STOP mode by the active level or edge on STOP pin input as selected
Note: Before entering STOP mode, be sure to disable interrupts. This is because if the signal on an
1. Stop oscillation, thereby stopping operation of all internal circuits.
2. The data memory, register, program status word, and port output latch hold the state in
3. Clear the prescaler and divider for the timing generator to 0.
4. The program counter holds the instruction address two instructions ahead the one that
a. Released by level (when RELM = 1)
1. Testing the port status
2. INT5 interrupt (interrupt generated at a falling edge on
pin is shared with P20 port and
external interrupt pin changes state during STOP (from entering STOP mode till completion of
warm-up) the interrupt latch is set to 1, so that the device may accept the interrupt immediately
after exiting STOP mode. Also, when reenabling interrupts after exiting STOP mode, be sure to
clear the unnecessary interrupt latches beforehand.
pin input level is high, and the device immediately goes to a release sequence (warm-up)
without entering STOP mode. Therefore, before STOP mode can be entered while RELM =
1, the
to do this verification.
which they were immediately before entering STOP mode.
placed the device in STOP mode (e.g., “SET (SYSCR1).7”).
The device is released from STOP mode by a high level on
Any instruction to place the device in STOP mode is ignored when executed while
LD
TEST
JRS
DI
SET
TEST
JRS
LD
DI
SET
RETI
STOP
pin input must be verified to be low in a program. There are following methods
(SYSCR1), 01010000B
(P2DR) . 0
F, SSTOPH
(SYSCR1) . 7
(P2DR) . 0
F, SINT5
(SYSCR1), 01010000B
(SYSCR1) . 7
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INT5
(external interrupt input 5). STOP mode is entered into by
; Select to be released from STOP mode by level
; Wait until
; IMF ← 0
; Place the device in STOP mode
; Do not enter STOP mode if P20 port input level is
; Do not enter STOP mode if P20 port input level is
; Select to be released from STOP mode by level
; IMF ← 0
; Place the device in STOP mode
high, to eliminate noise
high, to eliminate noise
STOP
pin input goes low
INT5
STOP
pin input)
pin input.
STOP
TMP88PS42NG
pin input. The
STOP