atmega32u4-16mu ATMEL Corporation, atmega32u4-16mu Datasheet - Page 272

• Manufacturer Part Number: atmega32u4-16mu
• Description: Atmega32u4 8-bit Avr Microcontroller With 32k Bytes Of Isp Flash And Usb Controller
• Manufacturer: ATMEL Corporation

22. USB controller
22.1
22.2
272
Features
Block Diagram
ATmega32U4
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•
•
•
The USB controller provides the hardware to interface a USB link to a data flow stored in a dou-
ble port memory (DPRAM).
The USB controller requires a 48 MHz ±0.25% reference clock (for Full-Speed operation), which
is the output of an internal PLL. The PLL generates the internal high frequency (48 MHz) clock
for USB interface, the PLL input is generated from an external lower frequency (the crystal oscil-
lator or external clock input pin from XTAL1; to satisfy the USB frequency accuracy and jitter,
only this clock source allows proper functionality of the USB controller).
The 48MHz clock is used to generate a 12 MHz Full-speed (or 1.5 MHz Low-Speed) bit clock
from the received USB differential data and to transmit data according to full or low speed USB
device tolerance. Clock recovery is done by a Digital Phase Locked Loop (DPLL) block, which is
compliant with the jitter specification of the USB bus.
To comply with the USB Electrical specification, USB Pads (D+ or D-) should be powered within
the 3.0 to 3.6V range. As ATmega32U4 can be powered up to 5.5V, an internal regulator pro-
vides the USB pads power supply.
Figure 22-1. USB controller Block Diagram overview
Supports full-speed and low-speed Device role
Complies with USB Specification v2.0
Supports ping-pong mode (dual bank)
832 bytes of DPRAM:
– 1 endpoint 64 bytes max (default control endpoint),
– 1 endpoints of 256 bytes max, (one or two banks),
– 5 endpoints of 64 bytes max, (one or two banks)
UCAP
VBUS
D-
D+
USB Regulator
Recovery
DPLL
Clock
UVCC
Interface
USB
clk
48MHz
Div-by-2
AVCC
PLL
&
clk
8MHz
USB DPRAM
XT1
PLL clock
Prescaler
Clock Mux
On-Chip
IntRC
CPU
7766A–AVR–03/08