atmega32u4-16mu ATMEL Corporation, atmega32u4-16mu Datasheet - Page 65

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atmega32u4-16mu

Manufacturer Part Number
atmega32u4-16mu
Description
Atmega32u4 8-bit Avr Microcontroller With 32k Bytes Of Isp Flash And Usb Controller
Manufacturer
ATMEL Corporation
Datasheet
10.2.2
10.2.3
10.2.4
7766A–AVR–03/08
Toggling the Pin
Switching Between Input and Output
Reading the Pin Value
If PORTxn is written logic one when the pin is configured as an output pin, the port pin is driven
high (one). If PORTxn is written logic zero when the pin is configured as an output pin, the port
pin is driven low (zero).
Writing a logic one to PINxn toggles the value of PORTxn, independent on the value of DDRxn.
Note that the SBI instruction can be used to toggle one single bit in a port.
When switching between tri-state ({DDxn, PORTxn} = 0b00) and output high ({DDxn, PORTxn}
= 0b11), an intermediate state with either pull-up enabled {DDxn, PORTxn} = 0b01) or output
low ({DDxn, PORTxn} = 0b10) occurs. Normally, the pull-up enabled state is fully acceptable, as
a high-impedance environment will not notice the difference between a strong high driver and a
pull-up. If this is not the case, the PUD bit in the MCUCR Register can be set to disable all pull-
ups in all ports.
Switching between input with pull-up and output low generates the same problem. The user
must use either the tri-state ({DDxn, PORTxn} = 0b00) or the output high state ({DDxn, PORTxn}
= 0b11) as an intermediate step.
Table 10-1
Table 10-1.
Independent of the setting of Data Direction bit DDxn, the port pin can be read through the
PINxn Register bit. As shown in
stitute a synchronizer. This is needed to avoid metastability if the physical pin changes value
near the edge of the internal clock, but it also introduces a delay.
gram of the synchronization when reading an externally applied pin value. The maximum and
minimum propagation delays are denoted t
DDxn
0
0
0
1
1
PORTxn
summarizes the control signals for the pin value.
0
1
1
0
1
Port Pin Configurations
(in MCUCR)
PUD
X
X
X
0
1
Figure
Output
Output
Input
Input
Input
I/O
10-2, the PINxn Register bit and the preceding latch con-
pd,max
Pull-up
Yes
No
No
No
No
and t
Tri-state (Hi-Z)
Pxn will source current if ext. pulled
low.
Tri-state (Hi-Z)
Output Low (Sink)
Output High (Source)
Comment
pd,min
respectively.
Figure 10-3
ATmega32U4
shows a timing dia-
65

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