atmega32u4-16mu ATMEL Corporation, atmega32u4-16mu Datasheet - Page 47

• Manufacturer Part Number: atmega32u4-16mu
• Description: Atmega32u4 8-bit Avr Microcontroller With 32k Bytes Of Isp Flash And Usb Controller
• Manufacturer: ATMEL Corporation

8. System Control and Reset
8.0.1
8.0.2
7766A–AVR–03/08
Resetting the AVR
Reset Sources
During reset, all I/O Registers are set to their initial values, and the program starts execution
from the Reset Vector. The instruction placed at the Reset Vector must be a JMP – Absolute
Jump – instruction to the reset handling routine. If the program never enables an interrupt
source, the Interrupt Vectors are not used, and regular program code can be placed at these
locations. This is also the case if the Reset Vector is in the Application section while the Interrupt
Vectors are in the Boot section or vice versa. The circuit diagram in
logic.
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes
active. This does not require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal
reset. This allows the power to reach a stable level before normal operation starts. The time-out
period of the delay counter is defined by the user through the SUT and CKSEL Fuses. The dif-
ferent selections for the delay period are presented in
The ATmega32U4 has five sources of reset:
• Power-on Reset. The MCU is reset when the supply voltage is below the Power-on Reset
• External Reset. The MCU is reset when a low level is present on the RESET pin for longer
• Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and the
• Brown-out Reset. The MCU is reset when the supply voltage V
• JTAG AVR Reset. The MCU is reset as long as there is a logic one in the Reset Register, one
• USB End of Reset. The MCU is reset (excluding the USB controller that remains enabled and
threshold (V
than the minimum pulse length.
Watchdog is enabled.
Reset threshold (V
of the scan chains of the JTAG system. Refer to the section
scan” on page 339
attached) on the detection of a USB End of Reset condition on the bus, if this feature is
enabled by the user.
Table 8-1
POT
defines the electrical parameters of the reset circuitry.
).
BOT
for details.
) and the Brown-out Detector is enabled.
“Clock Sources” on page
“IEEE 1149.1 (JTAG) Boundary-
CC
Figure 8-1
is below the Brown-out
ATmega32U4
27.
shows the reset
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