m30262f8gp Renesas Electronics Corporation., m30262f8gp Datasheet - Page 145

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m30262f8gp

Manufacturer Part Number
m30262f8gp
Description
Renesas 16-bit Cmos Single-chip Microcomputer M16c Family / M16c/20 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Clock Asynchronous Serial I/O (UART) Mode
Figure 1.15.25. Output timing of the parity error signal
Figure 1.15.26. SIM interface format
(a) Function to output a parity error signal
(b) Direct format/inverse format
complete flag
During reception, with the error signal output enable bit (bit 7 of address 037D
can output an “L” level from the T
comparing with the case in which the error signal output enable bit (bit 7 of address 037D
signed “0”, the transmission completion interrupt occurs in the half cycle later of the transfer clock.
Therefore parity error signals can be detected by a transmission completion interrupt program. Figure
1.15.25 shows the output timing of the parity error signal.
Connecting the SIM card allows you to switch between direct format and inverse format. If you choose
the direct format, D
and output from TxD
Figure 1.15.26 shows the SIM interface format.
(inverse)
LSB first
Transfer
Transfer
Receive
(direct)
Preliminary Specifications Rev. 0.9
TxD
TxD
clcck
Specifications in this manual are tentative and subject to change.
RxD
TxD
clock
2
2
2
2
H
H
H
L
L
L
1
0
0
2
data is output from TxD
.
ST
D0
D7
D0
Renesas Technology Corp.
X
D
D1
D6
2
D1
pin when a parity error is detected. And during transmission,
D2
D5
D2
2
. If you choose the inverse format, D
D3
D4
D3
Hi-Z
D4
D3
D4
D5
D2
D5
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
D6
D1
D6
D7
D0
ST : Start bit
P : Even Parity
SP : Stop bit
D7
P
P
P
P : Even parity
16
) assigned “1”, you
SP
M16C/26 Group
7
data is inverted
16
) is as-
139

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