m30262f8gp Renesas Electronics Corporation., m30262f8gp Datasheet - Page 39

• Manufacturer Part Number: m30262f8gp
• Description: Renesas 16-bit Cmos Single-chip Microcomputer M16c Family / M16c/20 Series
• Manufacturer: Renesas Electronics Corporation.

Clock Generating Circuit
Figure 1.8.4b. Peripheral clock select register
Figure 1.8.4c. Processor mode register 2
Peripheral clock select register (Note)
0 0 0
b7
Processor mode register 2 (Note 1)
b6
b7
b5
b6
Preliminary Specifications Rev. 0.9
b5
b4
0 0 0
Specifications in this manual are tentative and subject to change.
b4
0 0 0 0
b3
b3
b2
b2
b1
b1
b0
b0
0
Note 1: Set bit 1 of the protect register (address 000A
Note 2: When the system clock is 16Mhz and more, must set to 2 waits.
Note 3: This bit cannot be changed from "1" to "0" in software.
Note 4: Setting PM21 to "1" results in the following:
Note 5: Setting PM22 to "1" results in the following:
Note 6: For NMI function, this bit must be set to "1" in first instruction after reset.
Note 7: When this bit is set to "1", the P8
Note: Set the bit 0 of the protect register (address 000A16) to "1" before rewriting
Nothing is assigned.
Writes must set each bit to "0". Read values are indeterminate.
Bit symbol
Bit symbol
Reserved bit
PM20
PM21
Reserved bit
PM24
PM22
PCLK0
PCLK1
Symbol
PM2
Symbol
PCLKR
this register.
to this register.
• BCLK is not halted by WAIT instruction.
• Writing to the following bits has no effect:
• The ring oscillator starts oscillating, and the ring oscillator clock becomes the
• Writing to CM10 disabled (stop mode is not entered).
• Watchdog timer does not stop when in wait mode or hold state.
watchdog timer count source.
CM02, of register CM0
CM05, of register CM0 (main clock is not halted)
CM07, of register CM0 (CPU clock source does not change)
CM10, of register CM1 (stop mode is not entered)
CM20, of register CM2 (oscillation stop, re-oscillation detection function settings
do not change)
Renesas Technology Corp.
System clock protective bit
(Notes 3,4)
Specifying wait when
accessing SFR registers
(Note 2)
P8
(Notes 3,6,7)
WDT count source
protective bit (Notes 3,5)
Timers A, B clock select bit
(Clock source for the
timers A, B, and the dead
time timer)
SI/O clock select bit
(Clock source for UART0
to UART2)
5
/NMI configuration bit
Bit name
Bit name
Address
001E
Address
025E
16
16
5
direction register must be "0".
When reset
XXX00000
0 : 2 waits
1 : 1 wait
0: P8
1: NMI function
0 : Clock is protected by PRCR
1 : Clock modification disabled
0 : CPU clock is used for the
1 : Ring oscillator clock is used
Must always be set to "0"
watchdog timer count source
for the watchdog timer count
source
register
5
When reset
function (NMI disable)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
0 : f
1 : f
0 : f
1 : f
16
Must always be set to
2
03
) to "1" before writing new values
Function
2
1
2SIO
1SIO
16
Function
R
M16C/26 Group
0
W
R
W
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