a3p250 Actel Corporation, a3p250 Datasheet - Page 116

• Manufacturer Part Number: a3p250
• Description: Proasic3 Flash Family Fpgas With Optional Soft Arm Support
• Manufacturer: Actel Corporation

ProASIC3 DC and Switching Characteristics
2 -1 0 4
Previous Version
Advanced v0.7
(January 2007)
The "PLL Macro" section was updated to include power-up information.
Table 2-11 • ProASIC3 CCC/PLL Specification was updated.
Figure 2-19 • Peak-to-Peak Jitter Definition is new.
The "SRAM and FIFO" section was updated with operation and timing
requirement information.
The "RESET" section was updated with read and write information.
The "RESET" section was updated with read and write information.
The "Introduction" in the "Advanced I/Os" section was updated to include
information on input and output buffers being disabled.
PCI-X 3.3 V was added to Table 2-11 • VCCI Voltages and Compatible Standards.
In the Table 2-15 • Levels of Hot-Swap Support, the ProASIC3 compliance
descriptions were updated for levels 3 and 4.
Table 2-43 • I/O Hot-Swap and 5 V Input Tolerance Capabilities in ProASIC3
Devices was updated.
Notes 3, 4, and 5 were added to Table 2-17 • Comparison Table for 5 V–
Compliant Receiver Scheme. 5 x 52.72 was changed to 52.7 and the Maximum
current was updated from 4 x 52.7 to 5 x 52.7.
The "VCCPLF PLL Supply Voltage" section was updated.
The "VPUMP Programming Supply Voltage" section was updated.
The "GL Globals" section was updated to include information about direct input
into quadrant clocks.
V
In Table 2-22 • Recommended Tie-Off Values for the TCK and TRST Pins, TSK
was changed to TCK in note 2. Note 3 was also updated.
Ambient was deleted from Table 3-2 • Recommended Operating Conditions.
VPUMP programming mode was changed from "3.0 to 3.6" to "3.15 to 3.45".
Note 3 is new in Table 3-4 • Overshoot and Undershoot Limits (as measured on
quiet I/Os)1.
In EQ 3-2, 150 was changed to 110 and the result changed from 3.9 to 1.951.
Table 3-6 • Temperature and Voltage Derating Factors for Timing Delays was
updated.
Table 3-5 • Package Thermal Resistivities was updated.
Table 3-14 • Summary of Maximum and Minimum DC Input and Output Levels
Applicable to Commercial and Industrial Conditions—Software Default Settings
(Advanced) and Table 3-17 • Summary of Maximum and Minimum DC Input
Levels Applicable to Commercial and Industrial Conditions (Standard Plus) were
updated.
Table 3-20 • Summary of I/O Timing Characteristics—Software Default Settings
(Advanced) and Table 3-21 • Summary of I/O Timing Characteristics—Software
Default Settings (Standard Plus) were updated.
Table
Consumption in ProASIC3 Devices was updated.
JTAG
was deleted from the "TCK Test Clock" section.
3-11 • Different
Changes in Current Version (v1.2)
Components
v1.2
Contributing
to
Dynamic
Power
3-17 to
3-20 to
Page
2-15
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2-64
2-40
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2-51
2-51
2-51
3-17
3-20
3-2
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