a3p250 Actel Corporation, a3p250 Datasheet - Page 26
a3p250
Manufacturer Part Number
a3p250
Description
Proasic3 Flash Family Fpgas With Optional Soft Arm Support
Manufacturer
Actel Corporation
Datasheet
1.A3P250.pdf
(198 pages)
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ProASIC3 DC and Switching Characteristics
User I/O Characteristics
Figure 2-2 • Timing Model
2 -1 4
I/O Banks only)
to Advanced
(Applicable
(Applicable for
Advanced I/O
LVPECL
t
Banks only)
PY
= 0.76 ns (Advanced I/O Banks)
Clock
Input LVTTL
M-LVDS
BLVDS,
LVDS,
Timing Model
Operating Conditions: –2 Speed, Commercial Temperature Range (T
V
CC
t
PY
(Non-Registered)
= 1.425 V
(Registered)
= 1.05 ns
t
I/O Module
I/O Module
t
t
PY
ICLKQ
ISUD
= 1.20 ns
= 0.26 ns
= 0.24 ns
D
Q
Register Cell
t
t
CLKQ
SUD
D
= 0.43 ns
= 0.55 ns
Combinational Cell
Q
(Advanced I/O Banks)
Combinational Cell
t
PD
Combinational Cell
t
Clock
PD
Input LVTTL
t
PY
= 0.87 ns
t
= 0.56 ns
PD
= 0.76 ns
= 0.47 ns
Combinational Cell
Combinational Cell
Y
Y
t
PD
t
PD
Y
= 0.47 ns
= 0.47 ns
v1.2
Register Cell
Combinational Cell
t
t
CLKQ
SUD
D
t
PD
Y
Y
= 0.43 ns
(Non-Registered)
= 0.55 ns
(Advanced I/O Banks)
= 0.49 ns
I/O Module
t
Q
DP
Clock
t
Input LVTTL
= 2.64 ns (Advanced I/O Banks)
(Non-Registered)
(Non-Registered)
PY
t
t
I/O Module
I/O Module
DP
= 0.76 ns
DP
Y
= 3.97 ns (Advanced I/O Banks)
= 3.66 ns (Advanced I/O Banks)
(Non-Registered)
I/O Module
t
DP
LVTTL Output drive strength = 12 mA
= 1.34 ns
D
t
t
OCLKQ
OSUD
(Registered)
I/O Module
LVTTL Output drive strength = 8 mA
LVCMOS 1.5 V Output drive strength = 4 mA
High slew rate
Q
= 0.31 ns
= 0.59 ns
t
(Advanced I/O Banks)
DP
High slew rate
= 2.64 ns
J
LVPECL (Applicable to
Advanced I/O Banks Only)L
= 70°C), Worst Case
High slew rate
LVTTL 3.3 V Output drive
strength = 12 mA High slew rate