s71pl129ja0 Meet Spansion Inc., s71pl129ja0 Datasheet - Page 107

• Manufacturer Part Number: s71pl129ja0
• Description: Stacked Multi-chip Product Mcp Flash Memory And Psram 128 Megabit 8m X 16-bit Cmos 3.0 Volt-only Simultaneous Operation, Page Mode Flash Memory With 64/32/16 Megabit 4m/2m/1m X 16-bit Pseudo-static Ram
• Manufacturer: Meet Spansion Inc.

Timing Diagrams
August 30, 2004 pSRAM_Type01_12_A1
Read Cycle
Address
Data Out
Figure 33. Timing of Read Cycle (CE# = OE# = V
A d v a n c e
Previous Data Valid
3 Volt
Symbol
twhz
twpc
taw
tbw
twp
tdw
tow
tow
twc
tcw
twr
tdh
tpa
tas
tpc
tcp
Performance Grade
I n f o r m a t i o n
t
OH
Write cycle time
Chipselect to end
of write
Address set up
Time
Address valid to
end of write
UB# , LB# valid
to end of write
Write pulse width
Write recovery
time
Write to output
High-Z
Data to write
time overlap
Data hold from
write time
End write to
output Low-Z
Write high pulse
width
P age read cycle
P age address
access time
P age write cycle
Chip select high
pulse width
Parameter
pSRAM Type 1
Density
t
AA
t
RC
Min
7.5
70
60
60
60
50
20
20
20
10
0
0
0
5
64Mb pSRAM
Page Mode
-70
Max
IL
20k
20k
20k
20k
20
5
, WE# = ZZ# = V
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Data Valid
IH
)
107