s71pl129ja0 Meet Spansion Inc., s71pl129ja0 Datasheet - Page 114

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s71pl129ja0

Manufacturer Part Number
s71pl129ja0
Description
Stacked Multi-chip Product Mcp Flash Memory And Psram 128 Megabit 8m X 16-bit Cmos 3.0 Volt-only Simultaneous Operation, Page Mode Flash Memory With 64/32/16 Megabit 4m/2m/1m X 16-bit Pseudo-static Ram
Manufacturer
Meet Spansion Inc.
Datasheet
Mode Register Update and Deep Sleep Timings
Notes:
1. Minimum cycle time for writing register is equal to speed grade of product.
114
Chip deselect to ZZ# low
ZZ# low to WE# low
Write register cycle time
Chip enable to end of write
Address valid to end of write
Write recovery time
Address setup time
Write pulse width
Deep Sleep Pulse Width
Deep Sleep Recovery
LB#, UB#
ZZ#
A4
CE#
WE#
CE#
ZZ#
Item
Figure 42. Deep Sleep Mode - Entry/Exit Timings (for 32M and 16M)
Figure 41. Deep Sleep Mode - Entry/Exit Timings (for 64M)
t
t
AS
ZZWE
t
CDZZ
t
t
WC
AW
t
BW
t
WP
A d v a n c e
Symbol
t
t
t
ZZMIN
ZZWE
CDZZ
t
t
t
t
t
t
WC
CW
AW
WR
WR
t
pSRAM Type 1
AS
R
t
t
ZZMIN
t
ZZMIN
WR
I n f o r m a t i o n
70/85
70/85
70/85
200
Min
10
40
10
5
0
0
Max
500
t
R
t
pSRAM_Type01_12_A1 August 30, 2004
R
Unit
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
Note
1
1
1

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