th50vsf3580aasb TOSHIBA Semiconductor CORPORATION, th50vsf3580aasb Datasheet - Page 20

• Manufacturer Part Number: th50vsf3580aasb
• Description: Sram Flash Memory Mixed Multi-chip Package
• Manufacturer: TOSHIBA Semiconductor CORPORATION

ID Read Mode
programmers to automatically identify the device type.
bank to ID Read mode. Banks are specified by inputting the bank address (BK) in the third bus write cycle of the
command cycle. To read an ID code, the bank address as well as the ID read address must be specified. From
address BK + 00 the maker code is output; from address BK + 01 the device code is output. From other banks,
data are output from the memory cells. Inputting a Reset command releases ID Read mode and returns the
device to Read mode.
Standby Mode
(1) Control using CEF and RESET
(2) Control using only RESET
Auto Sleep Mode
longer, the device automatically enters Sleep mode and the current becomes standby current (I
the device is in simultaneous operation, the device does not enter Standby mode but causes the operating current
to flow. Because the output data are latched, data are output in Sleep mode. When the address is changed, Sleep
mode is automatically released, outputting data from the changed address.
Output Disable Mode
ID Read mode is used to read the device maker code and device code. The mode is useful for EPROM
In this method, simultaneous operation can be performed. Inputting an ID Read command sets the specified
Access time in ID Read mode is the same as that in Read mode. For the codes, see the ID Code Table.
There are two methods of entering Standby mode.
Function which suppresses power dissipation during read. When address input does not change for 150 ns or
Inputting V
mode and the current becomes standby current (I
the device does not enter Standby mode but causes the operating current to flow.
current becomes standby current (I
terminate the current operation and set the device to Standby mode. This is a hardware reset, described
later.
When the device is in Read mode, input V
When the device is in Read mode, input V
In standby mode, DQ is put in high-impedance state.
IH
to OE disables output from the device, setting DQ to high-impedance.
CCS1
). Even if the device is in simultaneous operation, this method can
SS
DD
± 0.3 V to RESET . The device enters Standby mode and the
± 0.3 V to CEF and RESET . The device enters Standby
CCS1
). However, if the device is in simultaneous operation,
TH50VSF3580/3581AASB
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CCS1
). However, if