k4h560838c Samsung Semiconductor, Inc., k4h560838c Datasheet - Page 17

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k4h560838c

Manufacturer Part Number
k4h560838c
Description
Ddr Sdram Specification Version 0.6
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
256Mb C-die(x4/8) DDR SDRAM
DLL Enable/Disable
upon returing to normal operation after having disabled the DLL for the purpose of debug or evaluation (upon
exiting Self Refresh Mode, the DLL is enabled automatically). Any time the DLL is enabled, 200 clock cycles
must occur before a READ command can be issued.
Output Drive Strength
The normal drive strength for all outputs is specified to be SSTL_2, Class II. Samsung supports a weak driver
strength option, intended for lighter load and/or point-to-point environments. I-V curves for the normal drive
strength and weak drive strength are included in 11.1~2 of this document.
*RFU
size. The default value of the extended mode register is not defined, therefore the extened mode register must
be written after power up for enabling or disabling DLL. The extended mode register is written by asserting low
on CS, RAS, CAS, WE and high on BA0(The DDR SDRAM should be in all bank precharge with CKE already
high prior to writing into the extended mode register). The state of address pins A0 ~ A11 and BA1 in the
same cycle as CS, RAS, CAS and WE going low are written in the extended mode register. Two clock cycles
are required to complete the write operation in the extended mode register. The mode register contents can
be changed using the same command and clock cycle requirements during operation as long as all banks are
in the idle state. A0 is used for DLL enable or disable. "High" on BA0 is used for EMRS. All the other address
pins except A0 and BA0 must be set to low for proper EMRS operation. Refer to the table for specific codes.
BA
3.2.2.2 Extended Mode Register Set(EMRS)
The DLL must be enabled for normal operation. DLL enable is required during power-up initialization, and
The extended mode register stores the data for enabling or disabling DLL, QFC and selecting output driver
BA
0
1
1
0
BA
1
0
Extended Funtions(EMRS)
A
(Existing)MRS Cycle
12
A
11
A
n
~ A
A
1 0
0
A
9
A
8
*RFU
Figure 7. Extend Mode Register set
A
7
*RFU : Must be set "0"
A
6
- 17 -
A
Output Driver Impedence Control
0
1
5
A
4
A
Normal
Weak
3
A
2
D.I.C
REV. 0.7 Jan. 31. 2002
A
1
DLL
A
0
Address Bus
Extended Mode Register
A
0
1
0
DLL Enable
Disable
Enable

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