k9f1g08r0a Samsung Semiconductor, Inc., k9f1g08r0a Datasheet - Page 10

• Manufacturer Part Number: k9f1g08r0a
• Description: 128m X 8 Bit / 256m X 8 Bit Nand Flash Memory
• Manufacturer: Samsung Semiconductor, Inc.

Program / Erase Characteristics
NOTE : 1. Typical program time is defined as the time within which more than 50% of the whole pages are programmed at Vcc of 3.3V ans 25’C.
K9F1G08R0A
MODE SELECTION
NOTE : 1. X can be V
K9F1G08U0A
VALID BLOCK
NOTE :
1. The
2. The 1st block, which is placed on 00h block address, is guaranteed to be a valid block, does not require Error Correction up to 1K program/erase
* :
AC TEST CONDITION
(K9F1G08X0A-XCB0 :TA=0 to 70 C, K9F1G08X0A-XIB0:TA=-40 to 85 C
K9F1G08R0A : Vcc=1.65V~1.95V, K9F1G08U0A : Vcc=2.7V~3.6V unless otherwise noted)
CAPACITANCE
NOTE : Capacitance is periodically sampled and not 100% tested.
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
Output Load
Program Time
Dummy Busy Time for Cache Program
Number of Partial Program Cycles
in the Same Page
Block Erase Time
K9F1G08X0A
K9K2G08U1A
Input/Output Capacitance
Input Capacitance
blocks is presented with both cases of invalid blocks considered. Invalid blocks are defined as blocks that contain one or more bad bits. Do not erase
or program factory-marked bad blocks
cycles.
Each K9F1G08U0A chip in the K9K2G08U1A has Maximum 20 invalid blocks.
CLE
H
H
X
X
X
X
X
L
L
L
L
K9F1G08X0A
2. WP should be biased to CMOS high or CMOS low for standby.
2. Max. time of tCBSY depends on timing between internal program completion and data in.
Parameter
Item
ALE
IL
X
H
H
X
X
X
X
L
L
L
L
or V
*1
may include invalid blocks when first shipped. Additional invalid blocks may develop while being used. The number of valid
(
T
K9K2G08U1A
Parameter
IH.
A
Parameter
=25 C, V
CE
H
L
L
L
L
L
L
X
X
X
X
.
CC
Refer to the attached technical notes for appropriate management of invalid blocks.
=1.8V/3.3V, f=1.0MHz)
Symbol
Symbol
N
N
C
C
VB
VB
Spare Array
I/O
IN
Main Array
WE
H
X
X
X
X
X
Test Condition
V
V
1004
2008
IN
RE
Min
IL
Symbol
H
H
H
H
H
H
X
X
X
X
t
t
=0V
=0V
PROG
CBSY
t
Nop
BERS
10
1 TTL GATE and CL=30pF
*2
*1
K9F1G08R0A
0V/V
0V to Vcc
WP
H
H
H
H
H
X
X
X
X
L
Vcc/2
CC
5ns
Min
(2)
-
-
-
-
Typ.
Min
-
-
-
-
Read Mode
Data Input
Data Output
During Read(Busy)
During Program(Busy)
During Erase(Busy)
Write Protect
Stand-by
Write Mode
Typ
200
3
2
-
-
FLASH MEMORY
Command Input
Address Input(4clock)
Command Input
Address Input(4clock)
1024
2048
Max
Max
1 TTL GATE and CL=50pF
10
10
Mode
K9F1G08U0A
Max
700
700
4
4
3
0V to Vcc
Vcc/2
5ns
Blocks
Blocks
Unit
Unit
pF
pF
cycles
cycles
Unit
ms
s
s