hx6256 Honeywell International's Solid State Electronics Center (SSEC), hx6256 Datasheet - Page 7

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hx6256

Manufacturer Part Number
hx6256
Description
32k X 8 Static Ram Solid State Electronics Center
Manufacturer
Honeywell International's Solid State Electronics Center (SSEC)
Datasheet

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HX6256
WRITE CYCLE AC TIMING CHARACTERISTICS (1)
(1) Test conditions: input switching levels VIL/VIH=0.5V/VDD-0.5V (CMOS), VIL/VIH=0V/3V (TTL), input rise and fall times <1 ns/V,
(2) Typical operating conditions: VDD=5.0 V, TA=25°C, pre-radiation.
(3) Worst case operating conditions: VDD=4.5 V to 5.5 V, -55 to 125°C, post total dose at 25°C.
(4) TAVAV = TWLWH + TWHWL
(5) Guaranteed but not tested.
(6) Chip Enable (CE) pin not available on 28-lead FP or DIP.
www.honeywell.com/radhard
TAVAVW
TWLWH
TSLWH
TDVWH
TAVWH
TWHDX
TAVWL
TWHAX
TWLQZ
TWHQX
TWHWL
TEHWH
input and output timing reference levels shown in the Tester AC Timing Characteristics table, capacitive output loading >50 pF, or
equivalent capacitive load of 5 pF for TWLQZ.
Symbol
Write Cycle Time
Write Enable Write Pulse Width
Chip Select to End of Write Time
Data Valid to End of Write Time
Address Valid to End of Write Time
Data Hold Time after End of Write Time
Address Valid Setup to Start of Write Time
Address Valid Hold after End of Write Time
Write Enable to Output Disable Time
Write Disable to Output Enable Time
Write Disable to Write Enable Pulse Width (5)
Chip Enable to End of Write Time (6)
Parameter
Typical (2)
13
10
12
5
0
0
3
4
9
9
0
9
Min
Worst Case (3)
25
20
20
15
20
20
0
0
0
0
5
5
Max
9
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7

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