lamxo256e Lattice Semiconductor Corp., lamxo256e Datasheet - Page 10

• Manufacturer Part Number: lamxo256e
• Description: La-machxo Automotive Family Data Sheet
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
The ispLEVER design tool takes the output of the synthesis tool and places and routes the design. Generally, the
place and route tool is completely automatic, although an interactive routing editor is available to optimize the
design.
Clock/Control Distribution Network
The LA-MachXO automotive family of devices provides global signals that are available to all PFUs. These signals
consist of four primary clocks and four secondary clocks. Primary clock signals are generated from four 16:1 muxes
as shown in Figure 2-7 and Figure 2-8. The available clock sources for the LA-MachXO256 and LA-MachXO640
devices are four dual function clock pins and 12 internal routing signals. The available clock sources for the LA-
MachXO1200 and LA-MachXO2280 devices are four dual function clock pins, up to nine internal routing signals
and up to six PLL outputs.
Figure 2-7. Primary Clocks for LA-MachXO256 and LA-MachXO640 Devices
Routing
12
Clock
Pads
4
2-7
LA-MachXO Automotive Family Data Sheet
16:1
16:1
16:1
16:1
Primary Clock 0
Primary Clock 1
Primary Clock 2
Primary Clock 3
Architecture