lamxo256e Lattice Semiconductor Corp., lamxo256e Datasheet - Page 25

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lamxo256e

Manufacturer Part Number
lamxo256e
Description
La-machxo Automotive Family Data Sheet
Manufacturer
Lattice Semiconductor Corp.
Datasheet

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Lattice Semiconductor
Device Configuration
All LA-MachXO devices contain a test access port that can be used for device configuration and programming.
The non-volatile memory in the LA-MachXO can be configured in two different modes:
The SRAM configuration memory can be configured in three different ways:
Figure 2-22 provides a pictorial representation of the different programming modes available in the LA-MachXO
devices. On power-up, the SRAM is ready to be configured with IEEE 1149.1 serial TAP port using IEEE 1532 pro-
tocols.
Leave Alone I/O
When using IEEE 1532 mode for non-volatile memory programming, SRAM configuration, or issuing a refresh
command, users may specify I/Os as high, low, tristated or held at current value. This provides excellent flexibility
for implementing systems where reconfiguration or reprogramming occurs on-the-fly.
TransFR (Transparent Field Reconfiguration)
TransFR (TFR) is a unique Lattice technology that allows users to update their logic in the field without interrupting
system operation using a single ispVM command. See Lattice technical note #TN1087, Minimizing System Inter-
ruption During Configuration Using TransFR Technology, for details.
Security
The LA-MachXO automotive devices contain security bits that, when set, prevent the readback of the SRAM con-
figuration and non-volatile memory spaces. Once set, the only way to clear the security bits is to erase the memory
space.
For more information on device configuration, please see details of additional technical documentation at the end
of this data sheet.
AEC-Q100 Tested and Qualified
The Automotive Electronics Council (AEC) consists of two committees: the Quality Systems Committee and the
Component Technical Committee. These committees are composed of representatives from sustaining and other
associate members. The AEC Component Technical Committee is the standardization body for establishing stan-
dards for reliable, high quality electronic components. In particular, the AEC-Q100 specification “Stress Test for
Qualification for Integrated Circuits” defines qualification and re-qualification requirements for electronic compo-
nents. Components meeting these specifications are suitable for use in the harsh automotive environment without
additional component-level qualification testing. Lattice's LA-ispMACH 4000V and LA-MachXO devices completed
and passed the requirements of the AEC-Q100 specification.
• In IEEE 1532 mode via the IEEE 1149.1 port. In this mode, the device is off-line and I/Os are controlled by
• In background mode via the IEEE 1149.1 port. This allows the device to remain operational in user mode
• At power-up via the on-chip non-volatile memory.
• After a refresh command is issued via the IEEE 1149.1 port.
• In IEEE 1532 mode via the IEEE 1149.1 port.
BSCAN registers.
while reprogramming takes place.
2-22
LA-MachXO Automotive Family Data Sheet
Architecture

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