lamxo256e Lattice Semiconductor Corp., lamxo256e Datasheet - Page 18

• Manufacturer Part Number: lamxo256e
• Description: La-machxo Automotive Family Data Sheet
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
output data signals are multiplexed and provide a single signal to the I/O pin via the sysIO buffer. Figure 2-17
shows the LA-MachXO PIO logic.
The tristate control signal is multiplexed from the output data signals and their complements. In addition a global
signal (TSALL) from a dedicated pad can be used to tristate the sysIO buffer.
The PIO receives an input signal from the pin via the sysIO buffer and provides this signal to the core of the device.
In addition there are programmable elements that can be utilized by the design tools to avoid positive hold times.
Figure 2-17. LA-MachXO PIO Block Diagram
sysIO Buffer
Each I/O is associated with a flexible buffer referred to as a sysIO buffer. These buffers are arranged around the
periphery of the device in groups referred to as Banks. The sysIO buffers allow users to implement the wide variety
of standards that are found in today’s systems including LVCMOS, TTL, BLVDS, LVDS and LVPECL.
In the LA-MachXO devices, single-ended output buffers and ratioed input buffers (LVTTL, LVCMOS and PCI) are
powered using V
supply, and a V
input buffers.
LA-MachXO256 and LA-MachXO640 devices contain single-ended input buffers and single-ended output buffers
with complementary outputs on all the I/O Banks.
LA-MachXO1200 and LA-MachXO2280 devices contain two types of sysIO buffer pairs.
1. Top and Bottom sysIO Buffer Pairs
The sysIO buffer pairs in the top and bottom Banks of the device consist of two single-ended output drivers and
two sets of single-ended input buffers (for ratioed or absolute input levels). The I/O pairs on the top and bottom
CCAUX
CCIO
Note: Buffer 1 tracks with V
From Routing
From Routing
Fast Output
Data signal
Input
Data Signal
. In addition to the Bank V
supply that powers up a variety of internal circuits including all the differential and referenced
Buffer 2 tracks with V
Buffer 3 tracks with internal 1.2V V
Buffer 4 is available in MachXO1200 and MachXO2280 devices only.
CCAUX
CCIO.
Programmable
Delay Elements
CCIO
REF .
supplies, the LA-MachXO devices have a V
2-15
DO
TS
LA-MachXO Automotive Family Data Sheet
sysIO
Buffer
4
1
2
3
+
-
From Complementary
Pad
TO
TSALL
PAD
CC
core logic power
Architecture