M25P05-AVDW6G NUMONYX [Numonyx B.V], M25P05-AVDW6G Datasheet - Page 20

• Manufacturer Part Number: M25P05-AVDW6G
• Description: 512 Kbit, serial Flash memory, 50 MHz SPI bus interface
• Manufacturer: NUMONYX [Numonyx B.V]

Instructions
6.2
20/52
Write disable (WRDI)
The write disable (WRDI) instruction
The write disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The write enable latch (WEL) bit is reset under the following conditions:
Figure 8.
Power-up
Write disable (WRDI) instruction completion
Write status register (WRSR) instruction completion
Page program (PP) instruction completion
Sector erase (SE) instruction completion
Bulk erase (BE) instruction completion.
Write disable (WRDI) instruction sequence
S
C
D
Q
High Impedance
0
(Figure
1
2
Instruction
8) resets the write enable latch (WEL) bit.
3
4
5
6
7
AI03750D
M25P05-A