eds1232aase Elpida Memory, Inc., eds1232aase Datasheet - Page 37

• Manufacturer Part Number: eds1232aase
• Description: 128m Bits Sdram
• Manufacturer: Elpida Memory, Inc.

Read with auto precharge to Write command interval
1. Different bank: When some banks are in the active state, the second write command (another bank) is executed.
2. Same bank: The consecutive write command from read with auto precharge (the same bank) is illegal. It is
Write with auto precharge to Read command interval
1. Different bank: When some banks are in the active state, the second read command (another bank) is executed.
2. Same bank: The consecutive read command from write with auto precharge (the same bank) is illegal. It is
Data Sheet E0350E31 (Ver. 3.1)
However, DQM must be set High so that the output buffer becomes High-Z before data input. The internal auto-
precharge of one bank starts at the next clock of the second command.
necessary to separate the two commands with a bank active command.
However, in case of a burst write, data will continue to be written until one clock before the read command is
executed. The internal auto-precharge of one bank starts at 2 clocks later from the second command.
necessary to separate the two commands with a bank active command.
DQ (output)
Command
DQ (input)
DQM
DQM
DQ (output)
CLK
Command
DQ (input)
BS
Note: Internal auto-precharge starts at the timing indicated by "
CL = 2
CL = 3
Read with Auto Precharge to Write Command Interval (Different bank)
Write with Auto Precharge to Read Command Interval (Different bank)
CLK
BS
bank0
WriteA
WRITA
in A0
Note: Internal auto-precharge starts at the timing indicated by "
bank0
ReadA
READA
bank3
Read
READ
bank3
Write
in B0
WRIT
in B1
37
High-Z
in B2
out B0
in B3
out B1
".
out B2
EDS1232AASE
out B3
".
BL = 4
CL = 3
BL = 4