sii3114 Silicon image, sii3114 Datasheet - Page 70

• Manufacturer Part Number: sii3114
• Description: Pci To Serial Ata Controller
• Manufacturer: Silicon image

SiI3114 PCI to Serial ATA Controller
Data Sheet
Channel X Task File Register 0
Address Offset: 80
Access Type: Read/Write
Reset Value: 0x0000_0000
This register contains some of the Channel X Task File registers and provides access to the data bus. Access to
this register is determined by the PCI bus Byte Enables at the time of the read or write operation, i.e., what is
accessed is determined by the address and by the size of the access. The register bits are defined below.
Channel X Task File Register 1
Address Offset: 84
Access Type: Read/Write
Reset Value: 0x0000_0000
This register defines one of the Channel X Task File registers in the SiI3114. Access to these bit fields is
permitted if the PCI bus Byte Enables are active for one byte only.
The Channel 0 Device Select bit (bit 4 of the byte, bit 20 of this register) MUST be 0 for proper operation of the
Channel 0 and Channel 2 registers when accessed via Base Address 5. The Channel 1 Device Select bit (bit 4 of
the byte, bit 20 of this register) MUST be 0 for proper operation of the Channel 1 and Channel 3 registers when
accessed via Base Address 5. The Device Select bit in the Channel 2 or Channel 3 Device+Head Task File is
ignored.
The register bits are defined below.
SiI-DS-0103-D
• Bit [31:00] : Data (R/W). This bit field provides access to the Channel X Data. This register can be
• Bit [31:24] : Task File Starting Sector Number (R/W). This bit field defines the Channel X Task File Starting
• Bit [23:16] : Task File Sector Count (R/W). This bit field defines the Channel X Task File Sector Count
• Bit [15:08] : Task File Features (W). This write-only bit field defines the Channel X Task File Features
• Bit [15:08] : Task File Error (R). This read-only bit field defines the Channel X Task File Error register.
• Bit [31:24] : Task File Command (W). This write-only bit field defines the Channel X Task File Command
• Bit [31:24] : Task File Status (R). This read-only bit field defines the Channel X Task File Status register.
• Bit [23:16] : Task File Device+Head (R/W). This bit field defines the Channel X Task File Device and Head
accessed as an 8-bit, 16-bit, or 32-bit word.
Sector Number register. Access to this bit field is permitted if the PCI bus Byte Enable is active for this byte
only.
register. Access to this bit field is permitted if the PCI bus Byte Enable is active for this byte only.
register. Access to this bit field is permitted if the PCI bus Byte Enable is active for this byte only.
Access to this bit field is permitted if the PCI bus Byte Enable is active for this byte only.
register.
register.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Starting Sector Number
Command + Status
H
H
/ C0
/ C4
H
H
/ 280
/ 284
H
H
/ 2C0
/ 2C4
H
H
Sector Count
Device+Head
Data (dword access)
62
Features (W) Error (R)
Cylinder High
Data (word access)
Data (byte access)
Cylinder Low
© 2007 Silicon Image, Inc.
Silicon Image, Inc.