AD362 AD [Analog Devices], AD362 Datasheet - Page 4

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AD362

Manufacturer Part Number
AD362
Description
PrecisionSample-and-Hold with 16-Channel Multiplexer
Manufacturer
AD [Analog Devices]
Datasheet

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Manufacturer
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cial temperatUre range device (AD362KD) while a Teflon ca-
pacitor is provided with units intended for operation at tempera-
tures up to 125°C (AD362SD). Use of an external capacitor
which is at Logic" 1" during conversion and Logic "0" be-
tween conversions. For slowly-changing inputs, throughput
speed may be increased by grounding the Sample-and-Hold
Command input instead of connecting it to the ADC status.
A Polystyrene hold capacitor is provided with each commer-
allows the user to make his own speed/accuracy tradeoff; a
Multiplexer channel address inputs are interfaced through a
level-triggered ("transparent")
channel. This address information can be held in the register
also function as a gated operational amplifier. Its uncommitted
differential inputs allow it to serve a second role as the output
subtractor in the differential amplifier. This eliminates one
amplifier and decreases drift, settling time and power consump-
tion. A Logic "1" on the Sample-and-Hold Command input
will cause the sample-and-hold to "freeze" the analog signal
while the ADC performs the conversion. Normally the Sample-
and-Hold Command is connected to th~ ADC Status output
at the Channel Select Latch input, the address signals feed
through the register to directly select the appropriate input
by placing a Logic "0" on the Channel Select Latch input. In-
:Iynamically switching the input mode control.
rernallogic monitors the status of the Single-Ended/Differential
Jerforms switching between single-ended and differential
~ither mode without external hard-wire interconnections.
Of more significance is the ability to serve a mixtUre of both
;ingle-ended and differential sources with a single AD362 by
lhe sample-and-hold is a high speed monolithic device that can
:er, channel address latches and control logic as shown in
~igure 1. The multiplexers can be connected to the differential
lmplifier in either an 8-channel differential or 16-channel
;ingle-ended configuration. A unique fearure of the AD362 is
In internal analog switch controlled by a digital input that
nodes. This fearure allows a single AD362 to perform in
:ial amplifier, a sample-and-hold with high-speed output buf-
\.0362 DESIGN
rhe AD362 consists of two 8-channel multiplexers, a differen-
ctively laser-trimmed.
. differential amplifier buffers the multiplexer outputs while
i1ded modes. Amplifier gain and common mode rejection are
lode inp<lt and addresses the multiplexers accordingly.
roviding high input impedance in b0th differential and. single-
Figure 1. A0362 Analog Input Section Functional Block
Diagram and Pinout
..'OW..
ANACOG
1
r
'NPUTS
'"'GW' A.ACOG '.PUTS
input register. With a Logic "1"
--
'"ANNEL
"LEO'
ONPU'
'"ANNEL
"LEO'
",,"
-4-
:{
configuration packages plug into standard sockets and are
easier to handle than larger packages with higher pin counts.
shown in Figure 2 and operating at maximum conversion rate.
The ADC is assumed to be a conventional 12 bit type such as
of contamination from solder particles or flux while low tem-
peratUre sealing maintains the accuracy of the laser-trimmed
Concept
speed precision analog-to-digital converter to form a complete
data acquisition system (DAS) in microcircuit form. Figure 2
shows a general AD362-with-ADC DAS application.
important advantages are realized. Performance of each design
is optimized for its specific function. Production yields are
increased thus decreasing costs. Furthermore, the standard
the AD572 or AD ADC80.
smaller capacitor will allow faster sample-and-hold response
but will decrease accuracy while a larger capacitor will in-
crease accuracy at slower conversion rates.
The output buffer is a high speed amplifier whose output
impedance remains low and constant at high frequencies.
Therefore, the AD362 may drive a fast, unbuffered, precision
ADC without loss of accuracy.
The AD362 is constructed on a substrate that includes thick-
film resistors for non-critical applications such as input pro-
tection and biasing. A separately-mounted
film resistor network is used to establish accurate gain and
high common-mode rejection. The metal package affords
electromagnetic and electrostatic shielding and is hermetically
welded at low temperatures. Welding eliminates the possibility
thin-film resistors.
THEORY OF OPERATION
The AD362 is intended to be used in conjunction with a high-
By dividing the data acquisition task into two sections, several
Svstem Timine:
Figure 3 is a timing diagram for the AD362 connected as
..of
STATUS
Figure 2.
System
CONVERT
ADDRESS
{SAMPlE.HOlD)
GATED
COMMAND
ADDRESS
CLOCK
lATCH
AD362
Figure 3. DAS Timing Diagram
AO362
with ADC as a Complete Data Acquisition
-
laser-trimmed thin-
~O"."'ON
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,,",,""
""",,
,m
'"'
,.
88
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.
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