XCS05-3BG100C XILINX [Xilinx, Inc], XCS05-3BG100C Datasheet - Page 23

• Manufacturer Part Number: XCS05-3BG100C
• Description: Spartan and Spartan-XL Families Field Programmable Gate Arrays
• Manufacturer: XILINX [Xilinx, Inc]

Table 12: Boundary Scan Instructions
Bit Sequence
The bit sequence within each IOB is: In, Out, 3-state. The
input-only pins contribute only the In bit to the boundary
scan I/O data register, while the output-only pins contributes
all three bits.
The first two bits in the I/O data register are TDO.T and
TDO.O, which can be used for the capture of internal sig-
nals. The final bit is BSCANT.UPD, which can be used to
drive an internal net. These locations are primarily used by
Xilinx for internal testing.
From a cavity-up view of the chip (as shown in the FPGA
Editor), starting in the upper right chip corner, the boundary
scan data-register bits are ordered as shown in
The device-specific pinout tables for the Spartan/XL devices
include the boundary scan locations for each IOB pin.
DS060 (v1.6) September 19, 2001
Product Specification
I2
0
0
0
0
1
1
1
1
Instruction
I1
0
0
1
1
0
0
1
1
R
I0
0
1
0
1
0
1
0
1
CONFIGURE
READBACK
(Spartan-XL
PRELOAD
SAMPLE/
Selected
EXTEST
IDCODE
BYPASS
USER 1
USER 2
only)
Test
Readback
IDCODE
BSCAN.
BSCAN.
Register
Register
Source
Bypass
DOUT
TDO1
TDO2
TDO
Data
DR
DR
User Logic
User Logic
Pin/Logic
Pin/Logic
I/O Data
Disabled
Figure
Source
Spartan and Spartan-XL Families Field Programmable Gate Arrays
DR
-
-
www.xilinx.com
1-800-255-7778
21.
BSDL (Boundary Scan Description Language) files for
Spartan/XL devices are available on the Xilinx website in
the File Download area. Note that the 5V Spartan devices
and 3V Spartan-XL devices have different BSDL files.
Including Boundary Scan in a Design
If boundary scan is only to be used during configuration, no
special schematic elements need be included in the sche-
matic or HDL code. In this case, the special boundary scan
pins TDI, TMS, TCK and TDO can be used for user func-
tions after configuration.
To indicate that boundary scan remain enabled after config-
uration, place the BSCAN library symbol and connect the
TDI, TMS, TCK and TDO pad symbols to the appropriate
pins, as shown in
TMS
TCK
TDI
Bit 0 ( TDO end)
Bit 1
Bit 2
Figure 22: Boundary Scan Schematic Example
User Logic
Figure 21: Boundary Scan Bit Sequence
From
(TDI end)
Figure
Optional
TDI
TMS
TCK
TDO1
TDO2
22.
TDO.T
TDO.O
Top-edge IOBs (Right to Left)
Left-edge IOBs (Top to Bottom)
MODE.I
Bottom-edge IOBs (Left to Right)
Right-edge IOBs (Bottom to Top)
BSCANT.UPD
BSCAN
IBUF
DRCK
SEL1
SEL2
IDLE
TDO
DS060_22_080400
To User
Logic
DS060_21_080400
To User
Logic
TDO
23