MK61FN1M0VMD12 FREESCALE [Freescale Semiconductor, Inc], MK61FN1M0VMD12 Datasheet - Page 69

• Manufacturer Part Number: MK61FN1M0VMD12
• Description: K61 Sub-Family Data Sheet
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

6.8.12 I2S/SAI Switching Specifications
This section provides the AC timing for the I2S/SAI module in master mode (clocks are
driven) and slave mode (clocks are input). All timing is given for noninverted serial clock
polarity (TCR2[BCP] is 0, RCR2[BCP] is 0) and a noninverted frame sync (TCR4[FSP]
Freescale Semiconductor, Inc.
Num
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
SDHC_CLK
Output SDHC_CMD
Output SDHC_DAT[3:0]
Input SDHC_CMD
Input SDHC_DAT[3:0]
Symbol
t
t
f
t
t
t
t
fpp
fpp
fpp
TLH
THL
t
OD
WL
WH
OD
ISU
IH
Table 48. SDHC switching specifications
SDHC output / card inputs SDHC_CMD, SDHC_DAT (reference to SDHC_CLK)
Clock frequency (low speed)
Clock frequency (SD\SDIO full speed)
Clock frequency (MMC full speed)
Clock frequency (identification mode)
Clock low time
Clock high time
Clock rise time
Clock fall time
SDHC output delay (output valid)
SDHC input setup time
SDHC input hold time
Description
SDHC input / card inputs SDHC_CMD, SDHC_DAT (reference to SDHC_CLK)
K61 Sub-Family Data Sheet Data Sheet, Rev. 3, 2/2012.
SD3
SD6
(continued)
Figure 32. SDHC timing
SD2
SD7
Preliminary
SD8
SD1
Peripheral operating requirements and behaviors
Min.
—
—
-5
0
0
0
0
7
7
5
0
Max.
400
400
6.5
25
20
—
—
—
—
3
3
MHz
MHz
Unit
kHz
kHz
ns
ns
ns
ns
ns
ns
ns
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