MK61FX512VMD12 FREESCALE [Freescale Semiconductor, Inc], MK61FX512VMD12 Datasheet - Page 16

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MK61FX512VMD12

Manufacturer Part Number
MK61FX512VMD12
Description
K61 Sub-Family
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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Part Number:
MK61FX512VMD12
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General
5.2.4 Power mode transition operating behaviors
All specifications except t
assume this clock configuration:
1. Normal boot (FTFE_FOPT[LPBOOT]=1)
5.2.5 Power consumption operating behaviors
16
Symbol
I
Symbol
DD_RUN
• CPU and system clocks = FEI 100 MHz
• Bus clock = 50 MHz
• FlexBus clock = 50 MHz
• Flash clock = 25 MHz
I
t
DDA
POR
Analog supply current
Run mode current — all peripheral clocks
disabled, code executing from flash
Description
After a POR event, amount of time from the point V
reaches 1.71 V to execution of the first instruction
across the operating temperature range of the chip.
Description
• @ 1.8V
• @ 3.0V
• VLLS1 → RUN
• VLLS2 → RUN
• VLLS3 → RUN
• LLS → RUN
• VLPS → RUN
• STOP → RUN
Table 5. Power mode transition operating behaviors
Table 6. Power consumption operating behaviors
POR
K61 Sub-Family Data Sheet, Rev. 4, 10/2012.
, and VLLSx→RUN recovery times in the following table
Table continues on the next page...
DD
Min.
Min.
51.1
51.7
Typ.
Max.
300
160
114
114
5.0
4.8
See note
5
Max.
160
162
Freescale Semiconductor, Inc.
Unit
μs
μs
μs
μs
μs
μs
μs
Unit
mA
mA
mA
Notes
Notes
1
1
2

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