CY8C201A0_12 CYPRESS [Cypress Semiconductor], CY8C201A0_12 Datasheet - Page 25

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CY8C201A0_12

Manufacturer Part Number
CY8C201A0_12
Description
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
AC GPIO Specifications
Table 11. 5-V and 3.3-V AC GPIO Specifications
Table 12. 2.7-V AC GPIO Specifications
AC I
Table 13. AC I
Document Number: 001-54607 Rev. *G
t
t
t
t
t
t
F
t
t
t
t
t
t
t
t
t
Rise0
Rise1
Fall
Rise0
Rise1
Fall
HDSTAI2C
LOWI2C
HIGHI2C
SUSTAI2C
HDDATI2C
SUDATI2C
SUSTOI2C
BUFI2C
SPI2C
SCLI2C
Parameter
Parameter
Parameter
2
C Specifications
2
C Specifications
Rise time, strong mode,
Cload = 50 pF, Port 0
Rise time, strong mode,
Cload = 50 pF, Port 1
Fall time, strong mode,
Cload = 50 pF, all ports
Rise time, strong mode,
Cload = 50 pF, Port 0
Rise time, strong mode,
Cload = 50 pF, Port 1
Fall time, strong mode,
Cload = 50 pF
SCL clock frequency
Hold time (repeated) START
condition. After this period, the
first clock pulse is generated
LOW period of the SCL clock
HIGH period of the SCL clock
Setup time for a repeated START
condition
Data hold time
Data setup time
Setup time for STOP condition
BUS free time between a STOP
and START condition
Pulse width of spikes suppressed
by the input filter
Description
Description
Description
Min
Min
Min
Standard Mode
250
4.7
4.0
4.0
4.7
4.0
4.7
15
10
10
15
10
10
0
0
Max
Max
Max
100
100
80
50
50
70
70
Unit
Unit
ns
ns
ns
ns
ns
ns
Min
100
0.6
1.3
0.6
0.6
0.6
1.3
0
0
0
Fast Mode
V
to 90%
V
V
to 90%
V
V
V
DD
DD
DD
DD
DD
DD
= 3.10 V to 3.6 V and 4.75 V to 5.25 V, 10%
= 3.10 V to 3.6 V, 10% – 90%
= 3.10 V to 3.6 V and 4.75 V to 5.25 V, 10%
= 2.4 V to 2.90 V, 10% – 90%
= 2.4 V to 2.90 V, 10% – 90%
= 2.4 V to 2.90 V, 10% – 90%
Max
400
50
Units
kbps Fast mode not
µs
µs
µs
µs
µs
ns
µs
µs
ns
Notes
Notes
supported for
V
DD
CY8C201A0
< 3.0 V
Notes
Page 25 of 38

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