NCP1611ADR2G ONSEMI [ON Semiconductor], NCP1611ADR2G Datasheet - Page 23

• Manufacturer Part Number: NCP1611ADR2G
• Description: Enhanced, High-Efficiency Power Factor Controller
• Manufacturer: ONSEMI [ON Semiconductor]

Hence, the maximum power that can be delivered by the
PFC stage is:
at low line
at high line
Remark:
condition possibly leading to a long interruption of the drive
activity (functions generating the STOP signal that disables
the drive – see block diagram − except OCP, i.e., OVP,
OverStress, SKIP, staticOVP and OFF). Otherwise, such
situations would be viewed as a normal dead−time phase and
V
compensate it. Instead, as illustrated in Figure 66, the V
signal is grounded leading to a short soft−start when the
circuit recovers.
ton
The “V
Figure 66. V
would inappropriately over−dimension V
ton
P
P
processing circuit” is “informed” when a
in,avg max
in,avg max
TON
Processing Circuit. The integrator OA1 amplifies the error between V
+
+
V
V
in,rms
in,rms
2 @ L
2 @ L
2
2
@ T
@ T
average, (V
ON(LL)
ON(HL)
TON
ton
http://onsemi.com
* (t
ton
to
1
+t
23
2
)/T) equates V
Regulation Block and Output Voltage Control
the inverting input and output is provided. It features a
typical trans−conductance gain of 200 mS and a maximum
capability of ±20 mA. The output voltage of the PFC stage
is typically scaled down by a resistors divider and monitored
by the inverting input (pin 8). Bias current is minimized
(less than 500 nA) to allow the use of a high impedance
feed−back network. However, it is high enough so that the
pin remains in low state if the pin is not connected.
A trans−conductance error amplifier (OTA) with access to
Figure 65. PWM circuit and timing diagram.
REGUL
.
REGUL
and IN1 so that on