NCP1611ADR2G ONSEMI [ON Semiconductor], NCP1611ADR2G Datasheet - Page 6

• Manufacturer Part Number: NCP1611ADR2G
• Description: Enhanced, High-Efficiency Power Factor Controller
• Manufacturer: ONSEMI [ON Semiconductor]

DETAILED PIN DESCRIPTION
Pin Number
1
2
3
4
5
6
7
8
FF
V
Feedback
CS / ZCD
V
CONTROL
Ground
Name
CONTROL
Drive
SENSE
V
CC
The error amplifier output is available on this pin. The network connected between this pin and
ground adjusts the regulation loop bandwidth that is typically set below 20 Hz to achieve high
Power Factor ratios.
Pin1 is grounded when the circuit is off so that when it starts operation, the power increases
slowly to provide a soft−start function.
A portion of the instantaneous input voltage is to be applied to pin 2 in order to detect
brown−out conditions. If V
until the pin voltage rises again and exceeds 1.0 V.
This pin also detects the line range. By default, the circuit operates the “low−line gain” mode. If
V
Conversely, if the pin voltage remains lower than 1.7 V for more than 25 ms, the low−line gain
is set.
Connecting the pin 2 to ground disables the part.
This pin sources a current representative to the line current. Connect a resistor between pin3
and ground to generate a voltage representative of the line current. When this voltage exceeds
the internal 2.5 V reference (V
voltage is below 2.5 V, a dead−time is generated that approximately equates
[83 ms x (1 − (V
current is small and a shorter one as the current increases.
The circuit skips cycles whenever V
operating near the line zero crossing where the power transfer is particularly inefficient. This
does result in a slightly increased distortion of the current. If superior power factor is required,
offset pin 3 by more than 0.75 V offset to inhibit the skip function.
This pin monitors the MOSFET current to limit its maximum current.
This pin is also connected to an internal comparator for Zero Current Detection (ZCD). This
comparator is designed to monitor a signal from an auxiliary winding and to detect the core
reset when this voltage drops to zero. The auxiliary winding voltage is to be applied through a
diode to avoid altering the current sense information for the on−time (see application
schematic).
Connect this pin to the PFC stage ground.
The high−current capability of the totem pole gate drive (−0.5/+0.8 A) makes it suitable to
effectively drive high gate charge power MOSFETs.
This pin is the positive supply of the IC. The circuit starts to operate when V
(A version, 17.0 V for the B version) and turns off when V
After start−up, the operating range is 9.5 V up to 35 V.
This pin receives a portion of the PFC output voltage for the regulation and the Dynamic
Response Enhancer (DRE) that drastically speeds−up the loop response when the output
voltage drops below 95.5% of the desired output level.
V
(UVP) comparators. The UVP comparator prevents operation as long as V
12% of the reference voltage (V
when V
driver is immediately disabled if the output voltage exceeds 107% of the desired level (fast
OVP).
A 250 nA sink current is built−in to trigger the UVP protection and disable the part if the
feedback pin is accidentally open.
pin 2
pin8
exceeds 2.2 V, the circuit detects a high−line condition and reduces the loop gain by 3.
is also the input signal for the (non−latching) Over−Voltage (OVP) and Under−Voltage
pin8
exceeds 105% of V
pin3
http://onsemi.com
/V
REF
))]. By this means, the circuit forces a longer dead−time when the
pin 2
6
REF
is lower than 0.9 V for more than 50 ms, the circuit stops pulsing
REF
REF
), the circuit operates in critical conduction mode. If the pin
. If despite of this, the output voltage still increases, the
pin 3
). A soft OVP comparator gradually reduces the duty−ratio
is below 0.65 V to prevent the PFC stage from
Function
CC
goes below 9.0 V (typical values).
pin8
CC
is lower than
exceeds 10.5 V