ATA5771_09 ATMEL [ATMEL Corporation], ATA5771_09 Datasheet - Page 207

• Manufacturer Part Number: ATA5771_09
• Description: Microcontroller with UHF ASK/FSK Transmitter
• Manufacturer: ATMEL [ATMEL Corporation]

18.10.3
18.10.3.1
18.10.3.2
154
ATtiny24/44/84
ADCL and ADCH – ADC Data Register
ADLAR = 0
ADLAR = 1
Table 18-6.
When an ADC conversion is complete, the result is found in these two registers.
When ADCL is read, the ADC Data Register is not updated until ADCH is read. Consequently, if
the result is left adjusted and no more than 8-bit precision is required, it is sufficient to read
ADCH. Otherwise, ADCL must be read first, then ADCH.
The ADLAR bit in ADCSRB, and the MUXn bits in ADMUX affect the way the result is read from
the registers. If ADLAR is set, the result is left adjusted. If ADLAR is cleared (default), the result
is right adjusted.
• ADC9:0: ADC Conversion Result
These bits represent the result from the conversion, as detailed in
page
Bit
0x05 (0x25)
0x04 (0x24)
Read/Write
Initial Value
Bit
0x05 (0x25)
0x04 (0x24)
Read/Write
Initial Value
148.
ADPS2
1
1
1
ADC Prescaler Selections (Continued)
ADC7
ADC9
ADC1
15
15
R
R
R
R
–
7
0
0
7
0
0
ADC6
ADC8
ADC0
14
14
R
R
R
R
ADPS1
–
6
0
0
6
0
0
0
1
1
ADC5
ADC7
13
13
R
R
R
R
–
5
0
0
–
5
0
0
ADC4
ADC6
12
12
R
R
R
R
–
4
0
0
–
4
0
0
ADPS0
1
0
1
ADC3
ADC5
11
11
R
R
R
R
–
3
0
0
–
3
0
0
ADC2
ADC4
10
10
R
R
R
R
–
2
0
0
–
2
0
0
”ADC Conversion Result” on
ADC9
ADC1
ADC3
Division Factor
R
R
R
R
9
1
0
0
9
–
1
0
0
128
32
64
ADC8
ADC0
ADC2
R
R
R
R
8
0
0
0
8
–
0
0
0
7701C–AVR–12/08
ADCH
ADCH
ADCL
ADCL