X4283 INTERSIL [Intersil Corporation], X4283 Datasheet - Page 16

• Manufacturer Part Number: X4283
• Description: CPU Supervisor with 128K EEPROM
• Manufacturer: INTERSIL [Intersil Corporation]

TIMING DIAGRAMS
Bus Timing
WP Pin Timing
Write Cycle Timing
Nonvolatile Write Cycle Timing
Note:
SDA OUT
Symbol
t
(1) t
SDA IN
WC
SCL
the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
(1)
SDA
WC
SCL
is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle. It is
t
SU:STA
SDA IN
SCL
WP
8
th
Bit of Last Byte
16
t
HD:STA
t
F
START
Write Cycle Time
t
SU:WP
Parameter
t
SU:DAT
Clk 1
t
HIGH
ACK
X4283, X4285
t
LOW
Slave Address Byte
t
HD:DAT
Condition
Stop
Min.
t
R
t
AA
t
HD:WP
Clk 9
t
WC
Typ.
t
DH
5
(1)
Condition
Start
Max.
t
BUF
10
t
SU:STO
March 29, 2005
Unit
ms
FN8121.0