K4S161622D-TC/L10 Samsung semiconductor, K4S161622D-TC/L10 Datasheet - Page 3

• Manufacturer Part Number: K4S161622D-TC/L10
• Description: 512K x 16Bit x 2 Banks Synchronous DRAM
• Manufacturer: Samsung semiconductor

K4S161622D
ABSOLUTE MAXIMUM RATINGS
Note :
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to V
Note :
CAPACITANCE
Recommended decoupling capacitance added to power line at board.
DECOUPLING CAPACITANCE GUIDE LINE
Note :
:
Voltage on any pin relative to Vss
Voltage on V
Storage temperature
Power dissipation
Short circuit current
Supply voltage
Input logic high votlage
Input logic low voltage
Output logic high voltage
Output logic low voltage
Input leakage current
Decoupling Capacitance between V
Decoupling Capacitance between V
RAS, CAS, WE, CS, CKE, L(U)DQM
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
1. V
2. V
3. Any input 0V
4. The VDD condition of K4S161622D-55/60 is 3.135V~3.6V.
1. V
2. V
Input leakage currents include HI-Z output leakage for all bi-directional buffers with Tri-State outputs.
All V
All V
Parameter
IH
IL
DD
SS
Parameter
(min) = -2.0V AC. The undershoot voltage duration is
(max) = 5.6V AC. The overshoot voltage duration is
DD
and V
and V
DD
SS
Parameter
supply relative to Vss
pins are connected in chip. All V
pins are connected in chip. All V
DQ
Address
SSQ
DDQ
Clock
0
Pin
~ DQ
(V
pins are separated each other
V
pins are separated each other.
IN
DD
15
= 3.3V, T
V
DDQ
.
DD
DDQ
A
V
and V
Symbol
DD
= 23 C, f = 1MHz, V
and V
V
V
V
V
, V
I
OH
OL
LI
IH
IL
DDQ
SS
SSQ
SSQ
DDQ
pins are connected in chip.
V
pins are connected in chip.
V
Symbol
DD
Symbol
IN
T
C
C
C
, V
I
, V
P
C
STG
OS
Min
-0.3
ADD
OUT
CLK
3.0
2.0
2.4
-10
D
IN
-
OUT
DDQ
REF
SS
= 0V, T
=1.4V
3ns.
3ns.
A
= 0 to 70 C)
200 mV)
Typ
3.3
3.0
Symbol
0
-
-
-
C
C
DC1
DC2
Min
2
2
2
3
V
-55 ~ +150
-1.0 ~ 4.6
-1.0 ~ 4.6
DDQ
Max
Value
3.6
0.8
0.4
10
-
50
1
+0.3
0.1 + 0.01
0.1 + 0.01
Value
Max
4
4
4
5
Unit
uA
CMOS SDRAM
V
V
V
V
V
Unit
mA
I
I
OH
W
Unit
V
V
OL
Unit
C
uF
uF
pF
pF
pF
pF
Note
= -2mA
= 2mA
4
1
2
3