K4S161622D-TC/L10 Samsung semiconductor, K4S161622D-TC/L10 Datasheet - Page 4

no-image

K4S161622D-TC/L10

Manufacturer Part Number
K4S161622D-TC/L10
Description
512K x 16Bit x 2 Banks Synchronous DRAM
Manufacturer
Samsung semiconductor
Datasheet
K4S161622D
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, T
Note :
Operating Current
(One Bank Active)
Precharge Standby Cur-
rent in power-down mode
Precharge Standby Current
in non power-down mode
Active Standby Current
in power-down mode
Active Standby Current
in non power-down mode
(One Bank Active)
Operating Current
(Burst Mode)
Refresh Current
Self Refresh Current
1. Unless otherwise notes, Input level is CMOS(V
2. Measured with outputs open. Addresses are changed only one time during tcc(min).
3. Refresh period is 32ms. Addresses are changed only one time during tcc(min).
4. K4S161622D-TC**
5. K4S161622D-TL**
Parameter
I
I
I
I
I
I
I
I
I
I
I
I
Symbol
CC1
CC2
CC2
CC2
CC2
CC3
CC3
CC3
CC3
CC4
CC5
CC6
P
PS
N
NS
P
PS
N
NS
CKE V
CKE & CLK V
CKE V
Input signals are changed one time during 30ns
CKE V
Input signals are stable
CKE V
CKE & CLK V
CKE V
Input signals are changed one time during 30ns
CKE V
Input signals are stable
Page Burst 2Banks Activated
IL
IH
IH
IL
IH
IH
(max), t
(max), t
(min), CS V
(min), CLK V
(min), CS V
(min), CLK V
Test Condition
t
t
RC
CCD
I
IL
IL
o
(max), t
(max), t
IH
CC
CC
= 0 mA
t
RC
Burst Length =1
t
I
= 2CLKs
/V
RC
o
CKE 0.2V
= 15ns
= 15ns
= 0 mA
IL
(min)
IH
IH
A
=V
t
IL
IL
RC
(min), t
(min), t
= 0 to 70 C)
CC
CC
(max), t
(max), t
DDQ
(min)
=
=
/V
CC
CC
SSQ
CC
CC
= 15ns
= 15ns
=
=
) in LVTTL.
Latency
CAS
3
2
3
2
3
2
120
155
105
-55
-
-
-
115
150
100
-60
-
-
-
Version
250
105
110
140
125
100
-70
15
25
15
90
2
2
5
3
3
1
CMOS SDRAM
130
115
-80
95
95
90
90
115
100
-10
85
80
80
80
Unit Note
mA
mA
mA
mA
mA
mA
mA
mA
mA
uA
2
2
3
4
5

Related parts for K4S161622D-TC/L10