K4R881869D Samsung semiconductor, K4R881869D Datasheet - Page 15

• Manufacturer Part Number: K4R881869D
• Description: 256/288Mbit RDRAM(D-die)
• Manufacturer: Samsung semiconductor

K4R571669D/K4R881869D
a. MSE/MS are fields of the SKIP register. For this combination (skip override) the tDCW parameter range is effectively 0.0 to 0.0.
b. t
c. This parameter also applies to a-1066 part when operated with t
d. With V
e. Effective hold becomes t
t
t
t
t
t
t
t
t
t
t
t
if [PDNX•256•t
CD
FRM
NLIMIT
REF
BURST
CCTRL
TEMP
TCEN
TCAL
TCQUIET
PAUSE
S,MIN
Symbol
IL,CMOS
and t
H,MIN
=0.5V
SCYCLE
for other t
CMOS
CTM/CFM stable after NAP/PDN entry
ROW packet to COL packet ATTN framing delay
Maximum time in NAP mode
Refresh interval
Interval after PDN or NAP (with self-refresh) exit in which all
banks of the RDRAM device must be refreshed at least once.
Current control interval
Temperature control interval
TCE command to TCAL command
TCAL command to quiet window
Quiet window (no read data)
RDRAM device delay (no RSL operations allowed)
] < [PDNXA•64•t
H4
’=t
-0.4V and V
CYCLE
H4
+[PDNXA•64•t
values can be interpolated between or extrapolated from the timings at the 2 specified t
IH,CMOS
SCYCLE
=0.5V
SCYCLE
+t
Parameter
PDNXB,MAX
CMOS
+t
Table 11: Timing Conditions
PDNXB,MAX
+0.4V
]. See Figure 50.
CYCLE
]-[PDNX•256•t
= 2.50ns
Page 13
SCYCLE
]
34 t
Min
100
150
140
CYCLE
7
2
100ms
Version 1.4 July 2002
200.0
Max
10.0
200
100
32
2
-
-
-
-
Direct RDRAM
CYCLE
ms/t
t
t
t
t
t
CYCLE
CYCLE
CYCLE
CYCLE
CYCLE
Unit
ms
ms
µs
µs
µs
CYCLE
values.
Figure(s)
Figure 49
Figure 48
Figure 47
Figure 52
Figure 53
Figure 54
Figure 55
Figure 55
Figure 55
Figure 55
page 38
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