MCIMX6U6AVM08AB Freescale Semiconductor, MCIMX6U6AVM08AB Datasheet - Page 40

• Manufacturer Part Number: MCIMX6U6AVM08AB
• Description: Processors - Application Specialized i.MX6 DualLite
• Manufacturer: Freescale Semiconductor
• Type: Automotive and Infotainment Processorsr

Specifications of MCIMX6U6AVM08AB

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 64 bit
• Maximum Clock Frequency: 800 MHz
• Instruction / Data Cache Memory: 32 KB
• Data Ram Size: 128 KB
• Data Rom Size: 96 KB
• Operating Supply Voltage: 1.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: BGA 2240
• Interface Type: I2S, SSI, AC97, ESAI, UARTS, eCSPI, I2C, Ethernet, PWM, SJC, GPIO, KPP, SPDIF
• Memory Type: DDR3
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

1
2
3
Electrical Characteristics
4.6.2.2
The DDR3/DDR3L interface mode fully complies with JESD79-3D DDR3 JEDEC standard release April,
2008. The parameters in
noted.
4.6.3
The LVDS interface complies with TIA/EIA 644-A standard. See TIA/EIA STANDARD 644-A,
“Electrical Characteristics of Low Voltage Differential Signaling (LVDS) Interface Circuits” for details.
40
Pull-up/Pull-down Impedance Mismatch Mmpupd
OVDD – I/O power supply (1.425 V–1.575 V for DDR3 and 1.283 V–1.45 V for DDR3L)
Vref – DDR3/DDR3L external reference voltage
The single-ended signals need to be within the respective limits (Vih(dc) max, Vil(dc) min) for single-ended signals as well as
the limitations for overshoot and undershoot.
240 Ω unit calibration resolution
Input current (no pull-up/down)
DC High-Level input voltage
DC Low-Level input voltage
DifferentialInput Logic High
DifferentialInput Logic Low
Keeper Circuit Resistance
High-level output voltage
High-level output voltage
Low-level output voltage
Low-level output voltage
Input Reference Voltage
Termination Voltage
LVDS I/O DC Parameters
Parameters
DDR3/DDR3L Mode I/O DC Parameters
i.MX 6Solo/6DualLite Automotive and Infotainment Applications Processors, Rev. 1
Table 26
Table 26. DDR3/DDR3L I/O DC Electrical Characteristics
are guaranteed per the operating ranges in
Symbol
Vih_DC
Vih_diff
Vil_DC
Vil_diff
Rkeep
VOH
VOH
Rres
VOL
VOL
Vref
Vtt
Iin
Voh (for all except ipp_dse=001)
Vol (for all except ipp_dse=001)
Voh (for ipp_dse=001)
Vol (for ipp_dse=001)
Vtt tracking OVDD/2
VI = 0,VI = OVDD
Test Conditions
Ioh= -0.1mA
Iol= 0.1mA
Ioh= -1mA
Iol= 1mA
0.49*OVDD
0.8*OVDD
See Note
0.2*OVDD
0.8*OVDD
0.2*OVDD
0.49*ovdd
Vref
OVSS
Table
Min
-2.9
105
-10
0.2
2
+0.1
3
1
9, unless otherwise
Freescale Semiconductor
0.51*OVDD
See Note
0.51*ovdd
Vref-0.1
OVDD
Max
-0.2
165
2.9
10
10
V
V
3
Unit
kΩ
μA
%
V
V
V
V
V
V
V
V
Ω