EPC4QI100 Altera, EPC4QI100 Datasheet - Page 3

• Manufacturer Part Number: EPC4QI100
• Description: IC CONFIG DEVICE 4MBIT 100-PQFP
• Manufacturer: Altera
• Series: EPCr

Specifications of EPC4QI100

• Programmable Type: In System Programmable
• Memory Size: 4Mb
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-MQFP, 100-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 544-2189

Features
© December 2009 Altera Corporation
CF52002-2.8
This chapter describes the EPC4, EPC8, and EPC16 enhanced configuration devices
(EPC).
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Single-chip configuration solution for Altera
APEX 20K, APEX 20KC, and APEX 20KE), APEX II, Arria
II, FLEX
Stratix II GX devices
Contains 4-, 8-, and 16-Mbit flash memories for configuration data storage
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Standard flash die and a controller die combined into single stacked chip package
External flash interface supports parallel programming of flash and external
processor access to unused portions of memory
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Page mode support for remote and local reconfiguration with up to eight
configurations for the entire system
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Supports byte-wide configuration mode fast passive parallel (FPP); 8-bit data
output per DCLK cycle
Supports true n-bit concurrent configuration (n = 1, 2, 4, and 8) of Altera FPGAs
Pin-selectable 2-ms or 100-ms power-on reset (POR) time
Configuration clock supports programmable input source and frequency synthesis
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Available in the 100-pin plastic quad flat pack (PQFP) and the 88-pin Ultra
FineLine BGA
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Supply voltage of 3.3 V (core and I/O)
Hardware compliant with IEEE Std. 1532 in-system programmability (ISP)
specification
On-chip decompression feature almost doubles the effective configuration
density
Flash memory block/sector protection capability via external flash interface
Supported in EPC16 and EPC4 devices
Compatible with Stratix series Remote System Configuration feature
Multiple configuration clock sources supported (internal oscillator and
external clock input pin)
External clock source with frequencies up to 100 MHz
Internal oscillator defaults to 10 MHz; Programmable for higher frequencies of
33, 50, and 66 MHz
Clock synthesis supported via user programmable divide counter
Vertical migration between all devices supported in the 100-pin PQFP package
®
10K (including FLEX 10KE and FLEX 10KA), Mercury
®
(UFBGA) packages
(EPC4, EPC8, and EPC16) Data Sheet
1. Enhanced Configuration Devices
Configuration Handbook (Complete Two-Volume Set)
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ACEX
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1K, APEX
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GX, Cyclone
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, Stratix
20K (including
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, Cyclone
®
II, and