MAX5965AEAX+T Maxim Integrated Products, MAX5965AEAX+T Datasheet
MAX5965AEAX+T
Specifications of MAX5965AEAX+T
Related parts for MAX5965AEAX+T
MAX5965AEAX+T Summary of contents
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... Power-Sourcing Equipment (PSE) Switches/Routers Midspan Power Injectors IEEE is a registered service mark of the Institute of Electrical and Electronics Engineers, Inc. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. for Power over Ethernet o IEEE 802.3af Compliant/Pre-IEEE 802.3at ® ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet ABSOLUTE MAXIMUM RATINGS (Voltages referenced unless otherwise noted RESET, A3–A0, SHD_, OSC, AGND, DGND, DET_ SCL, SDAIN, AUTO .............................................-0.3V to +80V OUT_........................................................-12V to (AGND ...
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High-Power, Quad, Monolithic, PSE Controllers ELECTRICAL CHARACTERISTICS (continued 32V to 60V 0V AGND +48V +48V AGND DGND DD wise.) (Note 2) PARAMETER SYMBOL CURRENT ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet ELECTRICAL CHARACTERISTICS (continued 32V to 60V 0V AGND +48V +48V AGND DGND DD wise.) (Note ...
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High-Power, Quad, Monolithic, PSE Controllers ELECTRICAL CHARACTERISTICS (continued 32V to 60V 0V AGND +48V +48V AGND DGND DD wise.) (Note 2) PARAMETER SYMBOL LOAD ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet ELECTRICAL CHARACTERISTICS (continued 32V to 60V 0V AGND +48V +48V AGND DGND DD wise.) (Note ...
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High-Power, Quad, Monolithic, PSE Controllers ELECTRICAL CHARACTERISTICS (continued 32V to 60V 0V AGND +48V +48V AGND DGND DD wise.) (Note 2) PARAMETER SYMBOL Differential ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet (V = -48V +3.3V AUTO AGND T = +25°C, all registers = default setting, unless otherwise noted.) A ANALOG SUPPLY CURRENT vs. INPUT VOLTAGE ...
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High-Power, Quad, Monolithic, PSE Controllers (V = -48V +3.3V AUTO AGND T = +25°C, all registers = default setting, unless otherwise noted.) A FOLDBACK CURRENT-LIMIT THRESHOLD vs. OUTPUT VOLTAGE 300 250 200 150 ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet (V = -48V +3.3V AUTO AGND T = +25°C, all registers = default setting, unless otherwise noted.) A RESET TO OUT TURN-OFF DELAY MAX5965A ...
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High-Power, Quad, Monolithic, PSE Controllers (V = -48V +3.3V AUTO AGND T = +25°C, all registers = default setting, unless otherwise noted.) A DETECTION WITH INVALID PD (33kΩ) MAX5965A toc22 0A 100ms/div DETECTION ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet (V = -48V +3.3V AUTO AGND T = +25°C, all registers = default setting, unless otherwise noted.) A DETECTION WITH INVALID PD (OPEN CIRCUIT, ...
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High-Power, Quad, Monolithic, PSE Controllers PIN NAME Serial Interface Input Data Line. Connect the data line optocoupler output to SDAIN (see the Typical 6 SDAIN Operating Circuits). Connect SDAIN to SDAOUT if using a 2-wire, I Address Bits. A3–A0 form ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet V SCL SDAIN SDAOUT SHD_ DD THREE-WIRE SERIAL PORT INTERFACE REGISTER FILE A3 AUTO MIDSPAN CENTRAL LOGIC UNIT (CLU) RESET INT DGND V DD AGND ANALOG +10V ANALOG ...
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High-Power, Quad, Monolithic, PSE Controllers Detailed Description The MAX5965A/MAX5965B are quad -48V power con- trollers designed for use in IEEE 802.3af-compliant/pre- IEEE 802.3at-compatible PSE. The devices provide PD discovery, classification, current limit, DC and AC load disconnect detections in compliance ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Operation Modes The MAX5965A/MAX5965B contain four independent, but identical state machines to provide reliable and real- time control of the four network ports. Each state machine has four operating modes: auto ...
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High-Power, Quad, Monolithic, PSE Controllers A valid PD has a 25kΩ discovery signature characteristic as specified in the IEEE 802.3af/at standard. Table 1 shows the IEEE 802.3af/at specification for a PSE detect- ing a valid PD signature. See the Typical ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Powered Device Classification (PD Classification) During the PD classification mode, the MAX5965A/ MAX5965B force a probe voltage (-18V) at DET_ and measure the current into DET_. The measured current determines the ...
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High-Power, Quad, Monolithic, PSE Controllers Figure 1a. Detection, Classification, and Power-Up Port Sequence Figure 1b. Detection, 2-Event Classification, and Power-Up Port Sequence ______________________________________________________________________________________ for Power over Ethernet 150ms 150ms 80ms DETI DETII 0V -4V -9V OUT_ -18V ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet t PGOOD POK_ PGOOD_ Figure 2. PGOOD_ Timing Overcurrent Protection A sense resistor R connected between SENSE_ and S V monitors the load current. Under normal operating EE conditions, the voltage ...
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High-Power, Quad, Monolithic, PSE Controllers Table 3. Automatic ICUT Programming PORT CL_DISC CLASSIFICATION ENx_CL6 EN_HP_ALL EN_HP_CL6 EN_HP_CL5 RESULT 0 Any ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet V supplies power for the internal logic circuitry ranges from +3.0V to +5.5V and determines the logic thresholds for the CMOS connections (SDAIN, SDAOUT, SCL, AUTO, SHD_, A_). This ...
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High-Power, Quad, Monolithic, PSE Controllers The R1Eh and R1Fh registers control the watchdog operation. The watchdog function, when enabled, allows the MAX5965A/MAX5965B to gracefully take over con- trol or securely shuts down the power to the ports in case of ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Each transmission consists of a START condition (Figure 6) sent by a master, followed by the MAX5965A/ MAX5965B 7-bit slave address plus R/W bit, a register address byte, one or more ...
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High-Power, Quad, Monolithic, PSE Controllers The MAX5965A/MAX5965B have a 7-bit long slave address (Figure 9). The bit following the 7-bit slave address (bit eight) is the R/W bit, which is low for a write command and high for a read ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Message Format for Reading The MAX5965A/MAX5965B read using the MAX5965A/ MAX5965B’s internally stored command byte as an address pointer, the same way the stored command byte is used as an address ...
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High-Power, Quad, Monolithic, PSE Controllers Register Map and Description The interrupt register (Table 6) summarizes the event register status and is used to send an interrupt signal (INT goes low) to the controller. Writing R1Ah[7] clears all ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet The power event register (Table 8) records changes in the power status of the four ports. Any change in PGOOD_ (R10h[7:4]) sets PG_CHG_ to 1. Any change in the PWR_EN_ (R10h[3:0]) ...
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High-Power, Quad, Monolithic, PSE Controllers LD_DISC_ is set high whenever the corresponding port shuts down due to detection of load removal. IMAX_FLT_ is set high when the port shuts down due to an extended overcurrent event after a successful start- ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet The MAX5965A/MAX5965B continuously monitor the power supplies and set the appropriate bits in the sup- ply event register (Table 12). V DD_OV whenever V /V exceeds its overvoltage threshold ...
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High-Power, Quad, Monolithic, PSE Controllers The port status register (Table 13a) records the results of the detection and classification at the end of each phase in three encoding bits each. R0Ch contains the detection and classification status of port 1. ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet PGOOD_ is set to 1 (Table 14) at the end of the power- up startup period if the power-good condition is met (0 < < ...
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High-Power, Quad, Monolithic, PSE Controllers The MAX5965A/MAX5965B use 2 bits for each port to set the mode of operation. Set the modes according to Table 16a and 16b. Table 16a. Operating Mode Register ADDRESS = 12h SYMBOL BIT P4_M1 7 ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Setting DET_EN_/CLASS_EN_ to 1 (Table 18) enables load detection/classification, respectively. Detection always has priority over classification. To perform clas- sification without detection, set the DET_EN_ bit low and CLASS_EN_ bit high. ...
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High-Power, Quad, Monolithic, PSE Controllers TSTART[1,0] (Table 20a) programs the startup timers. Startup time is the time the port is allowed cur- rent limit during startup. TFAULT[1,0] programs the fault time. Fault time is the time allowed ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Setting CL_DISC to 1 (Table 21) enables port over class current protection, where the MAX5965A/MAX5965B scales down the overcurrent limit (V to the port classification status. This feature provides protection to ...
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High-Power, Quad, Monolithic, PSE Controllers Writing CLR_INT (Table 23) clears all the event registers and the corresponding interrupt bits in regis- ter R00h. Writing RESET_P_ turns off power to the corresponding port and resets ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Enable 2-event classification for a port by setting the corre- sponding ENx_CL6 bit (Table 25). When the bit is enabled, the classification cycle will be repeated three times at 21.3ms intervals. ...
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High-Power, Quad, Monolithic, PSE Controllers Setting EN_WHDOG (Table 27) high activates the watchdog counter. When the counter reaches zero, the port switches to the hardware-controlled mode deter- mined by the corresponding HWMODE_ bit. A low in HWMODE_ switches the port ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet HP[2:0] programs the default power setting that is writ- ten upon the discovery of a class PD. A reset or power-up sets R24h = 00h. Table 29. ...
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High-Power, Quad, Monolithic, PSE Controllers The IVEE bits enable the current-limit scaling (Table 32). This feature is used to reduce the current limit for systems running at higher voltage to maintain the Table 32. Miscellaneous Configurations 2 ADDRESS = 29h ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Table 34c. ICUT Register Bit Values for Current-Limit Threshold ICUT_[2:0] (ADDRESS = 2Ah, 2Bh) 000 001 010 011 100 101 110 111 Table 35a. Classification Status Registers ADDRESS = 2Ch, 2Dh, ...
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High-Power, Quad, Monolithic, PSE Controllers Table 35b. Class Sequence States (continued) CLASS_[5:0] CLASS (ADDRESS = 2Ch, 2Dh, SEQUENCE 2Eh, 2Fh) 101010 Illegal 101011 Illegal 101100 Illegal 101101 Illegal 101110 Illegal 101111 Illegal 110000 Reserved 110001 Reserved 110010 Reserved 110011 Reserved ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet Table 37. Register Summary ADDR REGISTER NAME R/W PORT INTERRUPTS 00h Interrupt RO G SUP_FLT 01h Interrupt Mask R/W G MASK7 EVENTS 02h Power Event RO 4321 PG_CHG4 03h Power Event ...
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High-Power, Quad, Monolithic, PSE Controllers Table 37. Register Summary (continued) ADDR REGISTER NAME R/W PORT MAXIM RESERVED 20h Reserved — G Reserved 21h Reserved — G Reserved 22h Reserved — G Reserved 23h Program R/W 4321 Reserved 24h High-Power Mode ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet PHY ISOLATION V (3.3V) CC 1.8V TO 5V, (REF TO DGND) 3kΩ 180Ω HPCL063L VCCRTN OPTIONAL BUFFER 180Ω SDA OPTIONAL BUFFER 180Ω SCL OPTIONAL BUFFER *USE HALO TG111-HRPE40NY OR PULSE HX6015NL ...
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High-Power, Quad, Monolithic, PSE Controllers ISOLATION V (3.3V (REF TO DGND) 180Ω 3kΩ HPCL063L VCCRTN OPTIONAL BUFFER 180Ω SDA OPTIONAL BUFFER 180Ω SCL OPTIONAL BUFFER Figure 14. PoE System Block Diagram ______________________________________________________________________________________ for Power over Ethernet ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet R10 2Ω R6 1Ω C3 15nF Q4 MMBTA56 GND GND 1 MAX5020 0.47μF 4 100V SS_SHDN C2 0.022μF -48V -48V Figure 15. -48V to ...
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High-Power, Quad, Monolithic, PSE Controllers DESIGNATION DESCRIPTION C1 0.1µF, 25V ceramic capacitor C2 0.022µF, 25V ceramic capacitor C3 15nF, 25V ceramic capacitor C4 220µF capacitor Sanyo 6SVPA220MAA C5 4.7µF, 16V ceramic capacitor C6 0.47µF, 100V ceramic capacitor C7 0.22µF, 16V ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet ISOLATION V (3.3V) CC 180Ω 3kΩ VCCRTN HPCL063L OPTIONAL BUFFER 180Ω SDA OPTIONAL BUFFER 180Ω SCL OPTIONAL BUFFER NOTE: ALL SIGNAL PINS ARE REFERENCED TO DGND. DGND RANGE IS BETWEEN V ...
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High-Power, Quad, Monolithic, PSE Controllers ISOLATION V (3.3V) CC 180Ω 3kΩ VCCRTN HPCL063L OPTIONAL BUFFER 180Ω SDA OPTIONAL BUFFER 180Ω SCL OPTIONAL BUFFER NOTE: ALL SIGNAL PINS ARE REFERENCED TO DGND. DGND RANGE IS BETWEEN V Typical Operating Circuit 2 ...
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High-Power, Quad, Monolithic, PSE Controllers for Power over Ethernet ISOLATION V (3.3V) CC 1.8V TO 3.7V, (REF TO DGND) 180Ω 3kΩ HPCL063L VCCRTN OPTIONAL BUFFER 180Ω SDA OPTIONAL BUFFER 180Ω SCL OPTIONAL BUFFER NOTE: ALL SIGNAL PINS ARE REFERENCED TO ...
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