MAX1533ETJ+ Maxim Integrated Products, MAX1533ETJ+ Datasheet - Page 34

IC POWER SUPPLY CONTROLER 32TQFN

MAX1533ETJ+

Manufacturer Part Number
MAX1533ETJ+
Description
IC POWER SUPPLY CONTROLER 32TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1533ETJ+

Applications
Power Supply Controller
Voltage - Input
4.5 ~ 26 V
Current - Supply
15µA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-TQFN Exposed Pad
Product
Power Monitors
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Accuracy
1 %
Sense Voltage (max)
5.5 V
Supply Current (max)
35 uA
Supply Voltage (max)
26 V
Supply Voltage (min)
6 V
Case
QFN
Dc
05+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
High-Efficiency, 5x Output, Main Power-Supply
Controllers for Notebook Computers
back-threshold voltage, the controller does not trigger
an on-time pulse, effectively skipping a cycle. This
allows the controller to maintain regulation above the
maximum input voltage, but forces the controller to
effectively operate with a lower switching frequency.
This results in an input threshold voltage at which the
controller begins to skip pulses (V
where f
Careful PC board layout is critical to achieving low
switching losses and clean, stable operation. The
switching power stage requires particular attention
(Figure 11). If possible, mount all of the power compo-
nents on the top side of the board, with their ground
terminals flush against one another. Follow these guide-
lines for good PC board layout:
• Keep the high-current paths short, especially at the
• Keep the power traces and load connections short.
• Minimize current-sensing errors by connecting CSH_
34
ground terminals. This practice is essential for sta-
ble, jitter-free operation.
This practice is essential for high efficiency. Using
thick copper PC boards (2oz vs. 1oz) can enhance
full-load efficiency by 1% or more. Correctly routing
PC board traces is a difficult task that must be
approached in terms of fractions of centimeters,
where a single mΩ of excess trace resistance caus-
es a measurable efficiency penalty.
and CSL_ directly across the current-sense resistor
(R
______________________________________________________________________________________
SENSE_
OSC
V
is the switching frequency selected by FSEL.
IN SKIP
).
(
)
PC Board Layout Guidelines
=
V
OUT
f
OSC
IN(SKIP)
t
1
ON MIN
(
):
)
• When trade-offs in trace lengths must be made, it is
• Route high-speed switching nodes (BST_, LX_, DH_,
1) Place the power components first, with ground termi-
2) Mount the controller IC adjacent to the low-side
3) Group the gate-drive components (BST_ diode and
4) Make the DC-DC controller ground connections as
5) Connect the output power planes directly to the out-
preferable to allow the inductor charging path to be
made longer than the discharge path. For example,
it is better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low-
side MOSFET or between the inductor and the out-
put filter capacitor.
and DL_) away from sensitive analog areas (REF,
FB_, CSH_, CSL_).
nals adjacent (N
anode). If possible, make all these connections on
the top layer with wide, copper-filled areas.
MOSFET, preferably on the back side opposite N
and N
drive lines short and wide. The DL_ and DH_ gate
traces must be short and wide (50 to 100 mils wide if
the MOSFET is 1 inch from the controller IC) to keep
the driver impedance low and for proper adaptive
dead-time sensing.
capacitor, LDO5 bypass capacitor) together near
the controller IC.
shown in Figures 1 and 11. This diagram can be
viewed as having two separate ground planes:
power ground, where all the high-power compo-
nents go; and an analog ground plane for sensitive
analog components. The analog ground plane and
power ground plane must meet only at a single point
directly at the IC.
put-filter-capacitor positive and negative terminals
with multiple vias. Place the entire DC-DC converter
circuit as close to the load as is practical.
H_
to keep LX_, GND, DH_, and the DL_ gate-
L
_ source, C
Layout Procedure
IN
, C
OUT
_, and D
L
L_
_

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