MAX8538EEI+ Maxim Integrated Products, MAX8538EEI+ Datasheet - Page 17

IC CNTRLR BUCK DUAL 28-QSOP

MAX8538EEI+

Manufacturer Part Number
MAX8538EEI+
Description
IC CNTRLR BUCK DUAL 28-QSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX8538EEI+

Applications
Controller, DDR
Voltage - Input
4.5 ~ 23 V
Number Of Outputs
2
Voltage - Output
0.8 ~ 3.6 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-QSOP
Output Voltage
0.8 V to 3.6 V
Output Current
30 A
Input Voltage
4.5 V to 23 V
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Case
SSOP
Dc
05+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
of the inductor ripple current (see the Inductor
Selection section). If R
is used for current sensing, make sure to use the maxi-
mum R
ature to avoid fault tripping of the current limit at
elevated temperature. Consideration should also be
given to the tolerance of the 200µA current sink.
When R
rent sensing, ringing on the LX voltage waveform can
interfere with the current limit. Below is the procedure for
selecting the value of the series RC snubber circuit:
1) Connect a scope probe to measure V
2) Find the capacitor value (connected from LX to
The resistor for critical dampening (R
x f
the desired damping and the peak voltage excursion.
The capacitor (C
the value of the C
power loss of the snubber circuit is dissipated in the
resistor (P
where V
frequency. Choose an R
the specific application’s derating rule for the power
dissipation calculated.
Additionally, there is parasitic inductance of the cur-
rent-sensing element, whether the high-side MOSFET
R
resistor R
with the output filter inductor. This parasitic inductance,
together with the output inductor, form an inductive
divider and cause error in the current-sensing voltage.
To compensate for this error, a series RC circuit can be
added in parallel with the sensing element (see Figure
1). The RC time constant should equal L
R
R equal to or less than R
C can be calculated as:
Load, Tracking, and DDR Memory Power Supplies
SENSE
DS(ON)
R
and observe the ringing frequency, f
GND) that reduces the ringing frequency by half.
The circuit parasitic capacitance (C
then equal to 1/3rd the value of the added capaci-
tance above. The circuit parasitic inductance (L
is calculated by:
x L
Dual-Synchronous Buck Controllers for Point-of-
DS(ON)
PAR
, or L
DS(ON)
IN
SENSE
RSNUB
(L
is the input voltage and f
. Adjust the resistor value up or down to tailor
P
RSNUB
SENSE_FET
L
SENSE_FET
PAR
at the highest operating junction temper-
of the high-side MOSFET is used for cur-
(L
) and can be calculated as:
SNUB
______________________________________________________________________________________
RSENSE
=
=
PAR
C
) should be at least 2 to 4 times
(
DS(ON)
2
SNUB
) or the actual current-sense
/ R
π
in order to be effective. The
SNUB
ILIM_
f
) are used, which is in series
R
DS(ON)
)
2
×
of the high-side MOSFET
1
/ 100. Then, the value of
power rating that meets
×
( )
V
IN
. First, set the value of
C
PAR
SNUB
SW
2
×
R
is the switching
.
) is equal to 2π
f
PAR
SW
LX
) at LX is
RSENSE
to GND,
PAR
)
/
Any PC board trace inductance in series with the sens-
ing element and output inductor should be added to
the specified FET or resistor inductance per the
respective manufacturer’s data sheet. For the case of
the MOSFET, it is the inductance from the drain to the
source lead.
An additional switching noise filter may be needed at
ILIM_ by connecting a capacitor in parallel with R
(in the case of R
the case of resistor sensing). For the case of R
sensing, the value of the capacitor should be:
For the case of resistor sensing:
The two step-down converters have independent,
adjustable soft-start. External capacitors from SS1/SS2
to ground are charged by an internal 5µA current
source to the corresponding feedback threshold.
Therefore, the soft-start time can be calculated as:
For example, 0.01µF from SS1 to ground corresponds
to approximately a 1.6ms soft-start period for step-
down 1.
The MAX8537/MAX8538/MAX8539 use a voltage-mode
control scheme that regulates the output voltage by
comparing the error-amplifier output (COMP) with a
fixed internal ramp to produce the required duty cycle.
The error amplifier is an operational amplifier with
25MHz bandwidth to provide fast response. The output
lowpass LC filter creates a double pole at the resonant
frequency that introduces a gain drop of 40dB per
decade and a phase shift of 180 degrees per decade.
The error amplifier must compensate for this gain drop
and phase shift to achieve a stable high-bandwidth
closed-loop system.
The basic regulator loop can be thought of as consist-
ing of a power modulator and an error amplifier. The
power modulator has DC gain set by V
a double pole, f
the output inductor (L), the output capacitor (C
its equivalent series resistance (R
equations that define the power modulator:
C = L
C = L
C > 50 / (3.1412 x f
P_LC
DS(ON)
T
C < 25 x 10
SENSE_FET
SS
RSENSE
Soft-Start Capacitor Setting
= C
, and a single zero, f
sensing) or from ILIM_ to LX (in
SS
/ (R
Compensation Design
x V
/ (R
-9
SENSE
FB
/ R
DS(ON)
S
ILIM_
/ 5µA
x R
ESR
x R) or
ILIM_
). Below are the
IN
x R)
)
/ V
Z_ESR
RAMP
, set by
O
DS(ON)
), and
, with
ILIM_
17

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