ISL6314IRZ Intersil, ISL6314IRZ Datasheet - Page 16

IC CTRLR PWM 1PHASE BUCK 32-QFN

ISL6314IRZ

Manufacturer Part Number
ISL6314IRZ
Description
IC CTRLR PWM 1PHASE BUCK 32-QFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6314IRZ

Applications
Controller, Intel VR11, AMD CPU
Voltage - Input
5 ~ 12 V
Number Of Outputs
1
Voltage - Output
0.38 ~ 1.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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The output of the error amplifier, V
sawtooth waveform to generate the PWM signal. The PWM
signal controls the timing of the Internal MOSFET drivers
and regulates the converter output so that the voltage at FB
is equal to the voltage at REF. This will regulate the output
voltage to be equal to Equation 4. The internal and external
circuitry that controls voltage regulation is illustrated in
Figure 4.
Load-Line (Droop) Regulation
Some microprocessor manufacturers require a
precisely-controlled output resistance. This dependence of
output voltage on load current is often termed “droop” or
“load line” regulation. By adding a well controlled output
impedance, the output voltage can effectively be level shifted
in a direction which works to achieve the load-line regulation
required by these manufacturers.
In other cases, the designer may determine that a more
cost-effective solution can be achieved by adding droop.
Droop can help to reduce the output-voltage spike that
results from fast load-current demand changes.
The magnitude of the spike is dictated by the ESR and ESL
of the output capacitors selected. By positioning the no-load
voltage level near the upper specification limit, a larger
negative spike can be sustained without crossing the lower
limit. By adding a well controlled output impedance, the
output voltage under load can effectively be level shifted
down so that a larger positive spike can be sustained without
crossing the upper specification limit.
FIGURE 4. OUTPUT VOLTAGE AND LOAD-LINE
R
FB
EXTERNAL CIRCUIT
+
-
V
V
V
DROOP
OFS
R
OUT
+
-
+
-
REGULATION WITH OFFSET ADJUSTMENT
C
C
C
C
REF
ISENO
COMP
RGND
ISEN+
VDIFF
VSEN
REF
FB
16
ISL6314 INTERNAL CIRCUIT
COMP
2k
I
OFS
VID DAC
ERROR AMPLIFIER
DIFFERENTIAL
REMOTE-SENSE
AMPLIFIER
, is compared to the
+
-
+
+
-
-
V
COMP
ISL6314
.
As shown in Figure 5, a voltage, V
current in the channel, I
remote-sense amplifier. The resulting voltage at the output of
the remote-sense amplifier is the sum of the output voltage
and the droop voltage. Equation 5 shows that feeding this
voltage into the compensation network causes the regulator
to adjust the output voltage so that it’s equal to the reference
voltage minus the droop voltage.
The droop voltage, V
current through the output inductors. This is accomplished
by using a continuous DCR current sensing method.
Inductor windings have a characteristic distributed
resistance or DCR (Direct Current Resistance). For
simplicity, the inductor DCR is considered as a separate
lumped quantity, as shown in Figure 5. The channel current,
I
Equation 5 shows the S-domain equivalent voltage, V
across the inductor.
The inductor DCR is important because the voltage dropped
across it is proportional to the channel current. By using a
simple R-C network and a current sense amplifier, as shown
in Figure 5, the voltage drop across the inductor’s DCR can
be extracted. The output of the current sense amplifier,
V
current I
If the R-C network components are selected such that the
R-C time constant matches the inductor L/DCR time
constant, then V
the DCR, multiplied by a gain. As Equation 7 shows,
V
I
V
V
L
OUT
DROOP
DROOP
DROOP
L
, flowing through the inductor, passes through the DCR.
s ( )
.
V
DROOP
=
ISL6314
s ( )
+
-
L
I
, can be shown to be proportional to the channel
FIGURE 5. DCR SENSING CONFIGURATION
L
, shown in Equation 6.
is therefore proportional to the total output current,
=
PHASE
ISENO
ISEN+
(
------------------------------------------------------------------------- -
(
ISEN-
s R
s L
COMP
DROOP
+
-------------
DCR
DCR
s L
DROOP
C
+
COMP
)
1
OUT
(OPTIONAL)
is equal to the voltage drop across
C
COMP
, feeds into the differential
+
, is created by sensing the
1
)
R
-----------------------
R
COMP
DROOP
S
R
S
R
I
INDUCTOR
COMP
L
L
V
( ) DCR
I
L
L
, proportional to the
(s)
DCR
-
October 8, 2009
C
I
L
FN6455.2
(EQ. 5)
(EQ. 6)
OUT
V
OUT
,
OUT

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