ISL6314IRZ Intersil, ISL6314IRZ Datasheet - Page 25

• Manufacturer Part Number: ISL6314IRZ
• Description: IC CTRLR PWM 1PHASE BUCK 32-QFN
• Manufacturer: Intersil

Specifications of ISL6314IRZ

• Applications: Controller, Intel VR11, AMD CPU
• Voltage - Input: 5 ~ 12 V
• Number Of Outputs: 1
• Voltage - Output: 0.38 ~ 1.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

.
In Equations 27 and 28, P
power loss and P
loss; the gate charge (Q
particular gate to source drive voltage PVCC in the
corresponding MOSFET data sheet; I
quiescent current with no load at both drive outputs; N
N
respectively. The I
the controller without capacitive load and is typically 75mW at
300kHz.
The total gate drive power losses are dissipated among the
resistive components along the transition path and in the
bootstrap diode. The portion of the total power dissipated in
the controller itself is the power dissipated in the upper drive
path resistance, P
P
power will be dissipated by the external gate resistors (R
and R
P
DR_UP
Q2
FIGURE 17. TYPICAL LOWER-GATE DRIVE TURN-ON PATH
Qg_TOT
FIGURE 16. TYPICAL UPPER-GATE DRIVE TURN-ON PATH
PVCC
PVCC
are the number of upper and lower MOSFETs
P
G2
P
I
DR
Qg_Q2
Qg_Q1
, and in the boot strap diode, P
) and the internal gate resistors (R
PHASE
=
=
R
R
LO2
P
⎛
⎝
BOOT
HI2
R
3
-- - Q
2
R
Qg_Q1
=
=
LO1
HI1
⋅
Q
3
-- - Q
2
Qg_Q2
DR_UP
G1
Q*
G2
⋅
VCC product is the quiescent power of
+
⋅
G1
⋅
LGATE
N
P
PVCC F
Qg_Q2
Q1
UGATE
G1
⋅
is the total lower gate drive power
, the lower drive path resistance,
PVCC F
Qg_Q1
+
and Q
Q
⋅
25
+
G2
SW
R
I
⋅
Q
G2
⋅
is the total upper gate drive
G2
R
N
⋅
SW
G
⋅
G1
VCC
Q2
N
) is defined at the
G
Q
Q2
R
C
⋅
⎞ F
⎠
GI2
BOOT
N
GD
R
is the driver total
⋅
C
C
Q1
GI1
GD
GS
SW
C
GI1
GS
. The rest of the
+
S
and R
I
S
Q
D
D
GI2
Q2
(EQ. 28)
C
(EQ. 27)
Q1
Q1
DS
C
) of
G1
DS
and
ISL6314
the MOSFETs. Figures 16 and 17 show the typical upper and
lower gate drives turn-on transition path. The total power
dissipation in the controller itself, P
estimated as shown in Equation 29:
Inductor DCR Current Sensing Component
Selection
For accurate load line regulation, the ISL6314 senses the
total output current by detecting the voltage across the
output inductor DCR (as described in “Load-Line (Droop)
Regulation” on page 16). As Figure 18 illustrates, an R-C
network is required to accurately sense the inductor DCR
voltage and convert this information into a “droop” voltage,
which is proportional to the total output current.
Choosing the components for this current sense network is a
two step process. First, R
chosen so that the time constant of this R
network matches the time constant of the inductor L/DCR.
Then the resistor R
sense network gain, obtaining the desired full load droop
voltage. Follow the steps outlined in the following to choose
the component values for this R-C network.
P
P
P
R
P
DR
DR_UP
DR_LOW
EXT1
BOOT
V
=
DROOP
ISL6314
P
=
+
-
FIGURE 18. DCR SENSING CONFIGURATION
=
DR_UP
=
R
PHASE
P
---------------------
=
⎛
⎜
⎝
ISENO
G1
ISEN+
Qg_Q1
--------------------------------------
R
ISEN-
⎛
⎜
⎝
3
HI1
--------------------------------------
R
+
HI2
+
R
-------------
R
N
+
P
GI1
HI1
R
Q1
DR_LOW
R
+
S
HI2
EXT1
R
must be chosen to set the current
EXT2
(OPTIONAL)
COMP
+
C
+
--------------------------------------- -
R
COMP
+
LO1
--------------------------------------- -
R
P
R
LO2
BOOT
EXT2
R
and C
R
+
LO1
R
S
DR
R
+
LO2
R
EXT1
I
R
INDUCTOR
COMP
+
, can be roughly
=
L
L
EXT2
(
COMP
V
R
I
Q
L
G2
(s)
⎞ P
⎟
⎠
COMP
⋅
⋅
VCC
⎞ P
⎟
⎠
DCR
+
---------------------
⋅
-
Qg_Q1
R
-------------
must be
---------------------
N
Qg_Q2
3
GI2
Q2
)
- C
2
October 8, 2009
COMP
(EQ. 29)
C
I
FN6455.2
OUT
V
OUT
OUT