ADP3208DJCPZ-RL ON Semiconductor, ADP3208DJCPZ-RL Datasheet - Page 22

IC CTLR BUCK 7BIT 2PHASE 48LFCSP

ADP3208DJCPZ-RL

Manufacturer Part Number
ADP3208DJCPZ-RL
Description
IC CTLR BUCK 7BIT 2PHASE 48LFCSP
Manufacturer
ON Semiconductor
Datasheet

Specifications of ADP3208DJCPZ-RL

Applications
Controller, Power Supplies for Next-Generation Intel Processors
Voltage - Input
3.3 ~ 22 V
Number Of Outputs
1
Voltage - Output
0.01 ~ 1.5 V
Operating Temperature
-10°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
48-LFCSP
Output Voltage
10 mV
Output Current
40 A
Input Voltage
19 V
Supply Current
6 mA
Switching Frequency
300 KHz
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 10 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Output Crowbar
damage due to overvoltage, the ADP3208D turns off the
DRVH1 and DRVH2 outputs and turns on the DRVL1 and
DRVL2 outputs when the output voltage exceeds the OVP
threshold (1.7 V typical).
capacitor to discharge and the current to reverse due to
current build up in the inductors. If the output overvoltage
is due to a drain−source short of the high−side MOSFET,
turning on the low−side MOSFET results in a crowbar
across the input voltage rail. The crowbar action blows the
fuse of the input rail, breaking the circuit and thus protecting
the microprocessor from destruction.
latched off. The latchoff function can be reset by removing
and reapplying VCC to the ADP3208D or by briefly pulling
the EN pin low.
protection function. In this configuration, VRTT should be
tied to ground.
Reverse Voltage Protection
V
output components. The ADP3208D provides a reverse
voltage protection (RVP) function without additional
system cost. The V
CSREF pin. When the CSREF pin voltage drops to less than
−300 mV, the ADP3208D triggers the RVP function by
disabling all PWM outputs and driving DRVL1 and DRVL2
low, thus turning off all MOSFETs. The reverse inductor
currents can be quickly reset to 0 by discharging the built−up
energy in the inductor into the input dc voltage source via the
forward−biased body diode of the high−side MOSFETs. The
RVP function is terminated when the CSREF pin voltage
returns to greater than −100 mV.
output reverse voltage because turning on the low−side
MOSFETs results in a very large reverse inductor current. To
CORE
To prevent the CPU and other external components from
Turning on the low−side MOSFETs forces the output
When the OVP feature is triggered, the ADP3208D is
Pulling TTSNS to less than 1.0 V disables the overvoltage
Very large reverse current in inductors can cause negative
Sometimes the crowbar feature inadvertently causes
Figure 39. Single−Phase CCM/DCM Frequency vs.
400
350
300
250
200
150
100
50
0
voltage, which is harmful to the CPU and other
0
9.0 V INPUT
2
CORE
4
Load Current
LOAD CURRENT (A)
voltage is monitored through the
19 V INPUT
6
8
10
12
http://onsemi.com
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prevent damage to the CPU caused from negative voltage,
the ADP3208D maintains its RVP monitoring function even
after OVP latchoff. During OVP latchoff, if the CSREF pin
voltage drops to less than −300 mV, the low−side MOSFETs
is turned off. DRVL outputs are allowed to turn back on
when the CSREF voltage recovers to greater than −100 mV.
ground causing the control to command a large duty cycle.
The output voltage climbs up. When the output voltage is
climbs 200 mV above the DAC voltage, the PWRGD signal
de−asserts. When the output voltage climbs to 1.7V, OVP is
enabled. In OVP, the phase 1 and phase 2 low side drive turns
on the low side power MOSFETs. The low side MOSFETs
pull the output voltage low through the power inductor.
When the output voltage falls below −300 mV, Reverse
Voltage Protection is enabled. In Reverse Voltage
Protection, all power MOSFETs are turned off. This protects
the CPU from seeing a large negative voltage.
Output Enable and UVLO
voltage to the controller must be greater than the V
threshold and the EN pin must be driven high. If the VCC
voltage is less than the V
a logic low, the ADP3208D shuts off. In shutdown mode, the
controller holds the PWM outputs low, shorts the capacitors
of the SS and PGDELAY pins to ground, and drives the
DRVH and DRVL outputs low.
during startup and shutdown of the ADP3208D. All input
pins must be at ground prior to removing or applying VCC,
and all output pins should be left in high impedance state
while VCC is off.
Thermal Throttling Control
detect whether the temperature of the VR has exceeded a
user−defined thermal throttling threshold. The thermal
monitoring circuit requires an external resistor divider
connected between the VCC pin and GND. The divider
consists of an NTC thermistor and a resistor. To generate a
Figure 40 shows a typical OVP test. FB pin is shorted to
For the ADP3208D to begin switching the VCC supply
The user must adhere to proper power supply sequencing
The ADP3208D includes a thermal monitoring circuit to
Figure 40. Overvoltage Protection and Reverse
PWRGD
Voltage Protection
CCUVLO
OUTPUT VOLTAGE
threshold or the EN pin is
LOW SIDE GATE
LOW SIDE GATE
PHASE 2
PHASE 1
CCO

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