SI5324-EVB Silicon Laboratories Inc, SI5324-EVB Datasheet - Page 10

• Manufacturer Part Number: SI5324-EVB
• Description: BOARD EVALUATION SI5324
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5324-EVB

• Main Purpose: Timing, Clock Multiplier
• Embedded: No
• Utilized Ic / Part: SI5324
• Primary Attributes: 2 Inputs, 2 Outputs
• Secondary Attributes: CML, CMOS, LVDS, LVPECL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Si5324
10
Option 1:
Option 2:
Option 1:
Option 2:
Input
Clock
Sources*
Input
Clock
Sources*
Figure 5. Si5324 Typical Application Circuit (SPI Control Mode)
Control Mode (L)
Figure 4. Si5324 Typical Application Circuit (I
Control Mode (H)
Crystal/Ref Clk Rate
Crystal/Ref Clk Rate
Crystal
Crystal
Reset
Reset
130 
Refclk+
Refclk–
130 
Refclk–
130 
Refclk+
82 
130 
82 
82 
82 
V
V
V
DD
V
DD
DD
DD
= 3.3 V
= 3.3 V
= 3.3 V
= 3.3 V
V
DD
15 k
15 k
V
130 
130 
82 
82 
DD
15 k
15 k
130 
130 
82 
82 
0.1 µF
0.1 µF
Notes:
0.1 µF
0.1 µF
Notes:
System
Supply
Power
System
1. Assumes differential LVPECL termination (3.3 V) on clock inputs.
2. Denotes tri-level input pins with states designated as L (ground), M (VDD/2), and H (VDD).
Supply
Power
CKIN2+
CKIN2–
CMODE
RST
CKIN1+
CKIN1–
XA
XB
RATE[1:0]
XA
XB
1. Assumes differential LVPECL termination (3.3 V) on clock inputs.
2. Denotes tri-level input pins with states designated as L (ground), M (VDD/2), and H (VDD).
CKIN1+
CKIN1–
CKIN2+
CKIN2–
CMODE
RST
XA
XB
RATE[1:0]
XA
XB
2
Ferrite
2
Bead
Preliminary Rev. 0.3
Ferrite
Bead
Si5324
Si5324
C
C
C
C
1
2
3
4
C
C
C
1 µF
C
0.1 µF
0.1 µF
0.1 µF
4
1
2
3
1 µF
0.1 µF
0.1 µF
0.1 µF
CKOUT1+
CKOUT1–
CKOUT2+
CKOUT2–
INT_C1B
CS_CA
A[2:0]
CKOUT1+
CKOUT1–
CKOUT2+
CKOUT2–
SDA
SCL
INT_C1B
C2B
LOL
CS_CA
SCLK
SDO
C2B
LOL
SDI
SS
0.1 µF
0.1 µF
0.1 µF
0.1 µF
2
100 
100 
C Control Mode)
0.1 µF
0.1 µF
0.1 µF
0.1 µF
Interrupt/CKIN_1 Invalid Indicator
CKIN_2 Invalid Indicator
PLL Loss of Lock Indicator
Serial Port Address
Serial Data
Serial Clock
Clock Select/Clock Active
100 
100 
Interrupt/CLKIN_1 Invalid Indicator
CLKIN_2 Invalid Indicator
PLL Loss of Lock Indicator
Slave Select
Serial Data Out
Serial Data In
Serial Clock
Clock Select/Clock Active
+
–
+
–
+
+
–
–
I2C Interface
Clock Outputs
SPI Interface
Clock Outputs