SI5324-EVB Silicon Laboratories Inc, SI5324-EVB Datasheet - Page 12

• Manufacturer Part Number: SI5324-EVB
• Description: BOARD EVALUATION SI5324
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5324-EVB

• Main Purpose: Timing, Clock Multiplier
• Embedded: No
• Utilized Ic / Part: SI5324
• Primary Attributes: 2 Inputs, 2 Outputs
• Secondary Attributes: CML, CMOS, LVDS, LVPECL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Si5324
The Si5324 has two differential clock outputs. The signal format of each clock output is independently
programmable to support LVPECL, LVDS, CML, or CMOS loads. When configured for CMOS, four clock outputs
are available. If not required, the second clock output can be powered down to minimize power consumption. In
addition, the phase of one output clock may be adjusted in relation to the phase of the other output clock. The
resolution varies from 800 ps to 2.2 ns depending on the PLL divider settings. The DSPLLsim software utility
determines the phase offset resolution for a given combination of input clock and multiplication ratio. For system-
level debugging, a bypass mode is available which drives the output clock directly from the input clock, bypassing
the internal DSPLL. The device is powered by a single 1.8, 2.5, or 3.3 V supply with best-in-class PSNR.
3.1. External Reference
An external, high quality 38.88 MHz clock or a low-cost 114.285 MHz 3rd overtone crystal or external reference is
used as part of a fixed-frequency oscillator within the DSPLL. This external reference is required for the device to
perform jitter attenuation. Specific recommendations can be found in the Family Reference Manual.
In digital hold, the DSPLL remains locked and tracks the external reference. Note that crystals can have
temperature sensitivities.
Due to the low bandwidth capabilities of this part, any low-frequency wander or instability on the external reference
will transfer to the output clocks. To address this issue, a stable external reference, TXCO, OCXO, or thermally-
isolated crystal is recommended.
For example, with a 20 ppm oscillator as the reference on the XA/XB pins, temperature changes cause the
oscillator to change frequency slightly. Although the Si5324 is locked to its input on CLKIN, it also uses the XA/XB
as a reference.
3.2. Additional Documentation
Consult the Silicon Laboratories Any-Frequency Precision Clock Family Reference Manual (FRM) for detailed
information about the Si5324. Additional design support is available from Silicon Laboratories through your
distributor.
Silicon Laboratories offers a PC-based software utility called DSPLLsim to simplify device configuration, including
frequency planning and loop bandwidth selection. The FRM and this utility can be downloaded from
http://www.silabs.com/timing.
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