AD7940-DBRD Analog Devices Inc, AD7940-DBRD Datasheet
AD7940-DBRD
Specifications of AD7940-DBRD
Related parts for AD7940-DBRD
AD7940-DBRD Summary of contents
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... CS and the conversion is also initiated at this point. There are no pipelined delays associated with the part. The AD7940 uses advanced design techniques to achieve very low power dissipation at fast throughput rates. The reference for the part is taken internally from V ...
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... Typical Connection Diagram ................................................... 12 Modes of Operation ....................................................................... 13 REVISION HISTORY 6/04—Revision 0: Initial Version Normal Mode.............................................................................. 13 Power-Down Mode.................................................................... 14 Power vs. Throughput Rate ........................................................... 15 Serial Interface ................................................................................ 16 Microprocessor Interfacing........................................................... 17 AD7940 to TMS320C541 .......................................................... 17 AD7940 to ADSP-218x.............................................................. 17 AD7940 to DSP563xx ................................................................ 18 Application Hints ........................................................................... 19 Grounding and Layout .............................................................. 19 Evaluating the AD7940 Performance ...................................... 19 Outline Dimensions ....................................................................... 20 Ordering Guide .......................................................................... 20 Rev Page ...
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... SCLK cycles Full-scale step input Sine wave input ≤ 10 kHz See the Serial Interface section Digital I 5.5 V; SCLK on or off 3.6 V; SCLK on or off 5 100 kSPS; 3.3 mA typ DD SAMPLE 100 kSPS; 1.29 mA typ DD SAMPLE SCLK on or off 5 SCLK on or off 3 AD7940 ...
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... AD7940 Parameter 4 Power Dissipation Normal Mode (Operational) Full Power-Down 1 Temperature range for B Version is –40°C to +85°C. 2 See the Terminology section. 3 Sample tested at initial release to ensure compliance. 4 See the Power vs. Throughput Rate section. B Version Unit Test Conditions/Comments 5 26.4 mW max 6.84 ...
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... Power up time from full power-down 200µ OUTPUT PIN C L 50pF 200µ Figure 2. Load Circuit for Digital Output Timing Specification Rev Page and timed from DD Figure 2. The measured number is then extrapolated , quoted in the timing characteristics is the true bus relinquish 8 1.6V AD7940 ...
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... AD7940 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 4. Parameter V to GND DD Analog Input Voltage to GND Digital Input Voltage to GND Digital Output Voltage to GND Input Current to Any Pin Except Supplies Operating Temperature Range Commercial (B Version) Storage Temperature Range Junction Temperature SOT-23 Package, Power Dissipation θ ...
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... SDATA Data Out. Logic output. The conversion result from the AD7940 is provided on this output as a serial data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream from the AD7940 consists of two leading zeros followed by 14 bits of conversion data that are provided MSB first ...
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... The AD7940 is tested using the CCIF standard where two input frequencies near the top end of the input bandwidth are used. In this case, the second-order terms are usually distanced in frequency from the original sine waves, while the third-order terms are usually at a frequency close to the input frequencies ...
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... TYPICAL PERFORMANCE CHARACTERISTICS Figure 5 shows a typical FFT plot for the AD7940 at 100 kSPS sample rate and 10 kHz input frequency. Figure 6 shows the signal-to-(noise + distortion) ratio performance versus the input frequency for various supply voltages while sampling at 100 kSPS with an SCLK of 2.5 MHz. ...
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... CODE Figure 9. AD7940 Typical INL 0 3.00V DD ° TEMP = 25 C 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 18000 0 2000 4000 Figure 10. AD7940 Typical DNL Rev Page 6000 8000 10000 12000 14000 16000 18000 CODE ...
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... The AD7940 is a fast, low power, 14-bit, single-supply ADC. The part can be operated from a 2. 5.5 V supply. When operated at either supply, the AD7940 is capable of throughput rates of 100 kSPS when provided with a 2.5 MHz clock. The AD7940 provides the user with an on-chip track-and-hold ...
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... INPUT . DD Digital Inputs The digital inputs applied to the AD7940 are not limited by the maximum ratings that limit the analog inputs. Instead, the digi- tal inputs applied can and are not restricted by the V + 0.3 V limit as on the analog inputs. For example, if the ...
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... MODES OF OPERATION The mode of operation of the AD7940 is selected by controlling the (logic) state of the CS signal during a conversion. There are two possible modes of operation, normal and power-down. The point at which CS is pulled high after the conversion has been initiated will determine whether or not the AD7940 will enter power-down mode ...
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... Figure 18 brought high before the 10th falling edge of SCLK, regardless of the SCLK frequency, the AD7940 will go back into power-down again. This avoids accidental power-up due to glitches on the CS line or an inadvertent burst of 8 SCLK cycles while CS is low ...
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... V). If the power-up time DD from power-down is 1 µs, and the remaining conversion time is 6.4 µs, (using a 16 SCLK transfer), then the AD7940 can be said to dissipate 6.84 mW for 7.4 µs during each conversion cycle. With a throughput rate of 10 kSPS, the cycle time is 100 µs. For the remainder of the conversion cycle, 92.6 µ ...
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... SDATA line will go back into three-state; otherwise SDATA returns to three-state on the 16th SCLK falling edge as shown in Figure 20. Sixteen serial clock cycles are required to perform the conver- sion process and to access data from the AD7940. CS going low ...
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... MICROPROCESSOR INTERFACING The serial interface on the AD7940 allows the part to be directly connected to a range of many different microprocessors. This section explains how to interface the AD7940 with some of the more common microcontroller and DSP serial interface protocols. AD7940 TO TMS320C541 The serial interface on the TMS320C541 uses a continuous ...
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... SCLKs between interrupts is a whole integer figure of N, then equi- distant sampling will be implemented by the DSP. AD7940 TO DSP563xx The connection diagram in Figure 23 shows how the AD7940 can be connected to the ESSI (synchronous serial interface) of the DSP-563xx family of DSPs from Motorola. Each ESSI (two ...
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... Digital and analog ground planes should be joined at only one place. If the AD7940 system where multiple devices require an AGND to DGND connection, the connection should still be made at one point only, a star ground point that should be established as close as possible to the AD7940 ...
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... This board is a complete unit allowing control and communicate with all Analog Devices evaluation boards ending in the CB designators. To order a complete evaluation kit, the particular ADC evaluation board needs to be ordered, e.g., EVAL-AD7940CB, the EVAL-CONTROL BRD2, and transformer. See the Evaluation Board application note for more information. ...