HI7190EVAL Intersil, HI7190EVAL Datasheet - Page 12

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HI7190EVAL

Manufacturer Part Number
HI7190EVAL
Description
EVALUATION PLATFORM HI7190
Manufacturer
Intersil
Datasheets

Specifications of HI7190EVAL

Number Of Adc's
1
Number Of Bits
24
Sampling Rate (per Second)
200k
Data Interface
Serial
Inputs Per Adc
1 Differential
Input Range
±2.5 V
Power (typ) @ Conditions
15mW @ 200kSPS
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
HI7190
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
AV
compromise the device performance.
Transducer Burn-Out Current Source
The V
source which can be turned on/off via the Control Register.
This current source can be used in checking whether a
transducer has burnt-out or become open before attempting
to take measurements on that channel. When the current
source is turned on an additional offset will be created
indicating the presence of a transducer. The current source is
controlled by the BO bit (Bit 4) in the Control Register and is
disabled on power up. See Figure 7 for an applications circuit.
Digital Section Description
A block diagram of the digital section of the HI7190 is shown
in Figure 8. This section includes a low pass decimation
filter, conversion controller, calibration logic, serial interface,
and clock generator.
Digital Filtering
One advantage of digital filtering is that it occurs after the
conversion process and can remove noise introduced during
MODULATOR
DD
LOAD CELL
FIGURE 7. BURN-OUT CURRENT SOURCE CIRCUIT
INHI
SYNC
- 1.8V. Exceeding this range on the V
CLOCK
FIGURE 8. DIGITAL SECTION BLOCK DIAGRAM
DIGITAL
FILTER
input of the HI7190 contains a 500nA (Typ) current
AND CONTROL
CALIBRATION
CONFIGURATION
12
RATIOMETRIC
SERIAL I/O
GENERATOR
RESET
CLOCK
CM
V
V
AV
AV
V
CURRENT
V
INLO
INHI
RHI
SOURCE
RLO
SS
DD
pin will
HI7190
OSC
OSC
SDO
SDIO
SCLK
CS
DRDY
2
1
HI7190
the conversion. It can not, however, remove noise present
on the analog signal prior to the ADC (which an analog filter
can).
One problem with the modulator/digital filter combination is
that excursions outside the full scale range of the device
could cause the modulator and digital filter to saturate. This
device has headroom built in to the modulator and digital
filter which tolerates signal deviations up to 33% outside of
the full scale range of the device. If noise spikes can drive
the input signal outside of this extended range, it is
recommended that an input analog filter is used or the
overall input signal level is reduced.
Low Pass Decimation Filter
The digital low-pass filter is a Hogenauer (sinc
filter. This filter was chosen because it is a cost effective low
pass decimating filter that minimizes the need for internal
multipliers and extensive storage and is most effective when
used with high sampling or oversampling rates. Figure 9
shows the frequency characteristics of the filter where f
the -3dB frequency of the input signal and f
programmed notch frequency. The analog modulator sends
a one bit data stream to the filter at a rate of that is
determined by:
f
f
The filter then converts the serial modulator data into 40-bit
words for processing by the Hogenauer filter. The data is
decimated in the filter at a rate determined by the CODE
word FP10-FP0 (programed by the user into the Control
Register) and the external clock rate. The equation is:
f
The Control Register has 11 bits that select the filter cutoff
frequency and the first notch of the filter. The output data
update rate is equal to the notch frequency. The notch
frequency sets the Nyquist sampling rate of the device while
the -3dB point of the filter determines the frequency
spectrum of interest (f
10 through 2047 where 10 yields a 1.953kHz Nyquist rate.
The Hogenauer filter contains alias components that reflect
around the notch frequency. If the spectrum of the frequency
of interest reaches the alias component, the data has been
aliased and therefore undersampled.
Filter Characteristics
Please note: We have recently discovered a
performance anomaly with the HI7190. The problem
occurs when the digital code for the notch filter is
programmed within certain frequencies. We believe the
error is caused by the calibration logic and the digital
notch code NOT the absolute frequency. The error is
seen when the user applies mid-scale (0V input, Bipolar
mode). With this input, the expected digital output
MODULATOR
MODULATOR
NOTCH
= f
OSC
= f
= 78.125kHz for f
/(512 x CODE).
OSC
/128
S
). The FP bits have a usable range of
OSC
= 10MHz.
N
is the
3
) decimating
June 27, 2006
FN3612.10
C
is

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