HI7190EVAL Intersil, HI7190EVAL Datasheet - Page 7

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HI7190EVAL

Manufacturer Part Number
HI7190EVAL
Description
EVALUATION PLATFORM HI7190
Manufacturer
Intersil
Datasheets

Specifications of HI7190EVAL

Number Of Adc's
1
Number Of Bits
24
Sampling Rate (per Second)
200k
Data Interface
Serial
Inputs Per Adc
1 Differential
Input Range
±2.5 V
Power (typ) @ Conditions
15mW @ 200kSPS
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
HI7190
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Pin Descriptions
Load Test Circuit
ESD Test Circuits
DIP, SOIC
V
20 LEAD
10
12
13
14
15
16
17
18
19
20
11
±
1
2
3
4
5
6
7
8
9
R
1
PIN NAME
RESET
MODE
DRDY
DGND
AGND
V
DV
SYNC
SCLK
AV
OSC
OSC
SDIO
AV
V
V
SDO
V
V
CS
INLO
RLO
INHI
RHI
CM
DD
SS
DD
2
1
C
ESD
FIGURE 5A.
R
Serial Interface Clock. Synchronizes serial data transfers. Data is input on the rising edge and output on the
falling edge.
Serial Data OUT. Serial data is read from this line when using a 3-wire serial protocol such as the
Motorola Serial Peripheral Interface.
Serial Data IN or OUT. This line is bidirectional programmable and interfaces directly to the Intel Standard Serial
Interface using a 2-wire serial protocol.
Chip Select Input. Used to select the HI7190 for a serial data transfer cycle. This line can be tied to DGND.
An Active Low Interrupt indicating that a new data word is available for reading.
Digital Supply Ground.
Negative Analog Power Supply (-5V).
External Reference Input. Should be negative referenced to V
External Reference Input. Should be positive referenced to V
Common Mode Input. Should be set to halfway between AV
Analog Input LO. Negative input of the PGIA.
Analog Input HI. Positive input of the PGIA. The V
the condition of an external transducer. This current source is controlled via the Control Register.
Positive Analog Power Supply (+5V).
Analog Supply Ground.
Positive Digital Supply (+5V).
Used to connect a crystal source between OSC
Oscillator Clock Input for the device. A crystal connected between OSC
or an external oscillator can drive OSC
Active Low Reset Pin. Used to initialize the HI7190 registers, filter and state machines.
Active Low Sync Input. Used to control the synchronization of a number of HI7190s. A logic ‘0’ initializes the converter.
Mode Pin. Used to select between Synchronous Self Clocking (Mode = 1) or Synchronous External Clocking
(Mode = 0) for the Serial Port.
2
7
DUT
HUMAN BODY
C
R
R
MACHINE MODEL
C
R
R
ESD
1
2
ESD
1
2
= 10MΩ
= 1.5kΩ
= 10MΩ
= 0Ω
= 100pF
= 200pF
DUT
HI7190
FIGURE 4.
1
. The oscillator frequency should be 10MHz (Typ).
V
1
R
C
1
L
(INCLUDES STRAY
1
CAPACITANCE)
INHI
and OSC
DESCRIPTION
V
input is connected to a current source that can be used to check
±
2
R
DD
. Leave open otherwise.
RLO
1
R
RHI
2
and AV
.
.
1
SS
DIELECTRIC
and OSC
.
DUT
FIGURE 5B.
2
will provide a clock to the device,
CHARGED DEVICE MODEL
R
R
1
2
= 1GΩ
= 1Ω
June 27, 2006
FN3612.10

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